| データシートサーチシステム |
|
ACE24LA1024ATMTH データシート(PDF) 3 Page - ACE Technology Co., LTD. |
|
|
|||||||||||||||||||||||||||||
ACE24LA1024ATMTH データシート(HTML) 3 Page - ACE Technology Co., LTD. |
|
3 / 18 page ![]() ACE24LA1024A Two-wire Serial EEPROM VER 1.3 3 Block Diagram Pin Descriptions Device/Page Addresses (A2, A1 and A0): The A2, A1 and A0 pins are device address inputs that are hard wire for the ACE24LA1024A. Eight 256K devices may be addressed on a single bus system (device addressing is discussed in detail under the Device Addressing section). Serial Data (SDA): The SDA pin is bi-directional for serial data transfer. This pin is open-drain driven and may be wire-ORed with any number of other open-drain or open- collector devices. Serial Clock (SCL): The SCL input is used to positive edge clock data into each EEPROM device and negative edge clock data out of each device. Write Protect (WP): The ACE24LA1024A has a Write Protect pin that provides hardware data protection. The Write Protect pin allows normal read/write operations when connected to ground (GND). When the Write Protection pin is connected to Vcc, the write protection feature is enabled and operates as shown in the following Table 1. Table1. Write Protect WP Pin Status ACE24LA1024A At VCC Full (1024K) Array At GND Normal Read / Write Operations |
|
|
リンク URL |
| ALLDATASHEETはお客様のビジネスに役立ちますか? [ DONATE ] |
Alldatasheetは | 広告 | お問い合わせ | プライバシーポリシー | データシートへのリンク | リンク交換 | メーカーリスト All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |