STM6717 datasheet(19/25 Pages) STMICROELECTRONICS

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STM6717/6718/6719/6720/6777/6778/6779*/6780*

Note: 1. Valid for Ambient Operating Temperature: TA = –40 to 85°C; VCC1 = 0.8 to 5.5V and VCC2 = 0.8 to 3.6V (except where noted).

2. Input leakage for the MRC pin is not tested.

3. Guaranteed by design.

4. The leakage current measured on the RST pin is tested with the reset de-asserted (output high impedance).

5. Selecting the appropriate external capacitor (preferably less than 100pF) allows systems designers to vary the minimum delay from

6µs (MRC pin left open) or more (see Table 7.).

Table 7. tMLMH Minimum Pulse Width

Note: 1. At 25°C (typical)

Manual (Push-button) Reset Input

VIL

MR Input Voltage

0.3VCC1

VIH

0.7VCC1

tMLMH

tMR

MR Minimum Pulse Width

(STM6717/18/19/20)

1µs

MR Minimum Pulse Width

(STM6777/78/79/80)

MRC connected via

capacitor to VSS

(5)

6µs

tMLRL

tMRD

MR to RST Output Delay

200

MR Glitch Immunity

(STM6717/18/19/20)

100

MR Pull-up Resistance

Ω

VCC1

Capacitor Value(1)

100pF

0.1µF

2.2µF

3.3µF

4.7µF

6.8µF

1.6V

120µs

120ms

2.6s

4.0s

5.6s

8.2s

2.0V

122µs

122ms

2.7s

4.0s

5.8s

8.3s

3.0V

125µs

125ms

2.7s

4.1s

5.9s

8.5s

4.0V

128µs

129ms

2.8s

4.2s

6.0s

8.7s

5.0V

130µs

130ms

2.8s

4.3s

6.1s

8.8s

Sym

Alter-

native

Description

Test Condition(1)

Min

Typ

Max

Unit

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