LMC7101 datasheet(22/32 Pages) MICROCHIP

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LMC7101

DS20006282A-page 22

 2019 Microchip Technology Inc.

4.0

APPLICATION INFORMATION

4.1

Input Common-Mode Voltage

Some amplifiers exhibit undesirable or unpredictable

performance when the inputs are driven beyond the

common-mode voltage range; for example, phase

inversion of the output signal. The LMC7101 tolerates

input overdrive by at least 200 mV beyond either rail

without producing phase inversion.

If the absolute maximum input voltage (700 mV beyond

either rail) is exceeded, the input current should be

limited to ±5 mA maximum to prevent reducing

reliability. A 10 kΩ series input resistor, used as a

current limiter, will protect the input structure from

voltages as large as 50V above the supply or below

ground. See Figure 4-1.

OUT

FIGURE 4-1:

Input Current-Limit Protection.

4.2

Output Voltage Swing

Sink and source output resistances of the LMC7101

are equal. Maximum output voltage swing is

determined by the load and the approximate output

resistance. To calculate the output resistance, use

Equation 4-1:

EQUATION 4-1:

ROUT

V DROP

I LOAD

------------------

VDROP is the voltage dropped within the amplifier

output stage. VDROP and ILOAD can be determined from

the VO (output swing) portion of the appropriate

Electrical Characteristics table. ILOAD is equal to the

typical output high voltage minus V+/2 and divided by

RLOAD. For example, using the LM7101A 5.0V DC

Electrical Characteristics table, the typical output high

voltage using a 2 kΩ load (connected to V+/2) is

4.989V, which produces an ILOAD of:

EQUATION 4-2:

1.245mA

4.989V

2.5V

–



------------------------------------







1.245mA

Voltage drop in the amplifier output stage is:

VDROP = 5.0V – 4.989V

VDROP = 0.011V

Because of output stage symmetry, the corresponding

typical output low voltage (0.011V) also equals VDROP.

EQUATION 4-3:

ROUT

0.011V

0.001245A

--------------------------

8.8 9





4.3

Driving Capacitive Loads

Driving a capacitive load introduces phase-lag into the

output signal, and this in turn reduces op-amp system

phase margin. The application that is least forgiving of

reduced phase margin is a unity gain amplifier. The

LMC7101 can typically drive a 100 pF capacitive load

connected directly to the output when configured as a

unity-gain amplifier.

4.4

Using Large-Value Feedback

Resistors

A large-value feedback resistor (> 500 kΩ) can reduce

the phase margin of a system. This occurs when the

feedback resistor acts in conjunction with input

capacitance to create phase lag in the feedback signal.

Input capacitance is usually a combination of input

circuit components and other parasitic capacitance,

such as amplifier input capacitance and stray printed

circuit board capacitance.

Figure 4-2 illustrates a method of compensating phase

lag caused by using a large-value feedback resistor.

Feedback capacitor CFB introduces sufficient phase

lead to overcome the phase lag caused by feedback

resistor RFB and input capacitance CIN. The value of

CFB is determined by first estimating CIN and then

applying the following formula from Equation 4-4:

EQUATION 4-4:

RIN CIN



RFB CFB





VIN

CFB

RFB

VOUT

CIN

RIN

FIGURE 4-2:

Canceling Feedback Phase

Lag.

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