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STM8S103F2 データシート(PDF) 84 Page - STMicroelectronics

部品番号 STM8S103F2
部品情報  Access line, 16 MHz STM8S 8-bit MCU, up to 8 Kbytes Flash, data EEPROM,10-bit ADC, 3 timers, UART, SPI, I²C
PDF  121 Pages
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メーカー  STMICROELECTRONICS [STMicroelectronics]
ホームページ  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STM8S103F2 データシート(HTML) 84 Page - STMicroelectronics

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Electrical characteristics
STM8S103F2 STM8S103F3 STM8S103K3
84/121
DocID15441 Rev 14
Figure 43. ADC accuracy characteristics
1. Example of an actual transfer curve
2. The ideal transfer curve
3. End point correlation line
ET = Total unadjusted error: maximum deviation between the actual and the ideal transfer curves.
EO = Offset error: deviation between the first actual transition and the first ideal one.
EG = Gain error: deviation between the last ideal transition and the last actual one.
ED = Differential linearity error: maximum deviation between actual steps and the ideal one.
EL = Integral linearity error: maximum deviation between any actual transition and the end point correlation
line.
Table 47. ADC accuracy with RAIN< 10 kΩ, VDD= 3.3 V
Symbol
Parameter
Conditions
Typ
Max(1)
1. Guaranteed by characterization results.
Unit
|ET|
Total unadjusted error(2)
2. ADC accuracy vs. negative injection current: Injecting negative current on any of the analog input pins
should be avoided as this significantly reduces the accuracy of the conversion being performed on another
analog input. It is recommended to add a Schottky diode (pin to ground) to standard analog pins which may
potentially inject negative current. Any positive injection current within the limits specified for IINJ(PIN) and
ΣIINJ(PIN) in Section 10.3.6 does not affect the ADC accuracy.
fADC = 2 MHz
1.6
3.5
LSB
fADC = 4 MHz
1.9
4
|EO|
Offset error(2)
fADC = 2 MHz
12.5
fADC = 4 MHz
1.5
2.5
|EG|
Gain error(2)
fADC = 2 MHz
1.3
3
fADC = 4 MHz
23
|ED|
Differential linearity error(2)
fADC = 2 MHz
0.7
1.0
fADC = 4 MHz
0.7
1.5
|EL|
Integral linearity error(2)
fADC = 2 MHz
0.6
1.5
fADC = 4 MHz
0.8
2
EO
EG
1LSBIDEAL
1LSBIDEAL
VDD VSS
–
1024
--------------------------------
=
1023
1022
1021
5
4
3
2
1
0
7
6
1
234
567
1021102210231024
(1)
(2)
ET
ED
EL
(3)
VDD
VSS



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