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L99UDL01 データシート(PDF) 11 Page - STMicroelectronics |
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L99UDL01 データシート(HTML) 11 Page - STMicroelectronics |
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11 / 24 page ![]() DB3264 Rev 3 11/24 L99UDL01 Device description 22 3V3 regulator drops below 3V3UV threshold the outputs (internal half bridges and drivers for external MOSFET) are disabled and the V3V3IUV bit is set in the SPI diagnostic register 13h. If, for any reason the 3V3 supply falls below 3V3RST for t3V3UV, the Logic State machine and all of the registers are RESET to their default state and held there. Upon rising out of 3V3RST RESET will be disabled and the L99UDL01 will enter Standby mode. 2.3 Charge pump The charge pump uses two external capacitors, which are switched with fCP. The output of the charge pump has a current limitation. In standby mode or after a global thermal shutdown has been triggered the charge pump is disabled. Figure 3. Charge pump low filtering and start-up At coming out of standby the outputs are enable tset_CP seconds after the charge pump voltage crosses the VCPLOW threshold. The CPLOW bit will remain set indicating that the charge pump was low since the last reading of the register. At any time the charge pump output voltage drops below VCPLOW and remains there for longer than tCP, the internal half bridges and the H-Bridge MOSFET gate drivers are pulled low, switching off the external MOSFETs, and CPLOW bit is set. The outputs are enabled as soon as the charge pump voltage exceeds the VCPLOW threshold for greater than tCP. Actuation can be restarted via SPI frame or EN_OUT rising edge according to configuration registers. Outputs that are actuated by the output override (OUTx_on) bits will automatically turn back on when the charge pump is above CPLOW for greater than tCP. The CPLOW bit will remain set indicating that the charge pump was low since the last read & clear of the register. In case of reaching the over-voltage shutdown threshold, VSOVSD, the charge pump is disabled and automatically restarted after VS recovered to normal operating voltage. The charge pump frequency can be dithered to reduce the impact on radio frequency emissions. This option is set via bit DITHN in register 03H. By default DITHN=0 and dithering is enabled. 2.4 Output functionality There are two groups of three drivers each. The three drivers in each group can be paralleled or driven independently. |
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