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L99UDL01 データシート(PDF) 12 Page - STMicroelectronics |
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L99UDL01 データシート(HTML) 12 Page - STMicroelectronics |
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12 / 24 page ![]() Device description L99UDL01 12/24 DB3264 Rev 3 The output configuration registers allow to identify which are the grouped outputs. The output configuration registers also provide a range of current regulation levels and on- time durations. The command to actuate an output has three components (after the parallel links and current regulation levels have been programmed) that comprise an actuation command. These are direction (HS/LS), on-time and braking duration (ex. 300 ms on-time, 100 ms braking time) and which side (HS/LS) is providing the current regulation. The unregulated side is protected by the overcurrent protection. All outputs, internal and external, are driven with active circuitry. Once an actuation cycle is completed and all devices have been commanded off, the active circuitry is disabled after ~10 µs to reduce quiescent loading. All outputs are then in a passive off state that will keep the outputs off (gates tied to their sources) in the face of noise on the load or supply. 2.4.1 Integrated Half Bridge Drivers (OUT1-OUT6) Three outputs are configured as switching drivers incorporating active recirculation to minimize power dissipation. The dead time between high and low side drivers is fixed within the functionality of the output drivers. Figure 4. OUT1-6 Block diagram All integrated outputs can be driven in timed voltage control (PWM duty cycle), timed current regulation control or on/off control. These outputs have over current protection, under current detection, and off-state diagnostics. Off state diagnostics may provide for non-active detection of Lock motor status. The output rise and fall times are controlled to provide the lowest EMI while minimizing the switching losses. This is done by controlling the edges to smooth out the corners of the waveform while maintaining a fast transition from one level to the other. |
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