USB5742BSLASH2G datasheet(6/48 Pages) MICROCHIP

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USB5742B

DS00002016H-page 6

 2022 Microchip Technology Inc. and its subsidiaries

2.0

INTRODUCTION

2.1

General Description

The Microchip USB5742B hub is low-power, OEM configurable, USB 3.2 Gen 1 hub feature controller with 2 down-

stream ports and advanced features for embedded USB applications. The USB5742B is fully compliant with the Univer-

sal Serial Bus Revision 3.2 Specification

and USB 2.0 Link Power Management Addendum. The USB5742B supports

5 Gbps SuperSpeed (SS), 480 Mbps Hi-Speed (HS), 12 Mbps Full-Speed (FS), and 1.5 Mbps Low-Speed (LS) USB

downstream devices on all enabled downstream ports.

The USB5742B supports the legacy USB speeds (HS/FS/LS) through a dedicated USB 2.0 hub feature controller that

is the culmination of five generations of Microchip hub feature controller design and experience with proven reliability,

interoperability, and device compatibility. The SuperSpeed hub feature controller operates in parallel with the USB 2.0

controller, decoupling the 5 Gbps SS data transfers from bottlenecks due to the slower USB 2.0 traffic.

The USB5742B supports downstream battery charging. The USB5742B integrated battery charger detection circuitry

supports the USB-IF Battery Charging (BC1.2) detection method and most Apple devices. The USB5742B provides the

battery charging handshake and supports the following USB-IF BC1.2 charging profiles:

• DCP: Dedicated Charging Port (Power brick with no data)

• CDP: Charging Downstream Port (1.5A with data)

• SDP: Standard Downstream Port (0.5A with data)

• Custom profiles loaded via SMBus or OTP

Additionally, the USB5742B includes many powerful and unique features such as:

PortSwap, which adds per-port programmability to USB differential-pair pin locations. PortSwap allows direct alignment

of USB signals (D+/D-) to connectors to avoid uneven trace length or crossing of the USB differential signals on the

PCB.

PHYBoost, which provides programmable levels of Hi-Speed USB signal drive strength

in the downstream port transceivers. PHYBoost attempts to restore USB signal integrity

in a compromised system environment. The graphic on the right shows an example of

Hi-Speed USB eye diagrams before and after PHYBoost signal integrity restoration. in

a compromised system environment

VariSense, which controls the USB receiver sensitivity enabling programmable levels of USB signal receive sensitivity.

This capability allows operation in a sub-optimal system environment, such as when a captive USB cable is used.

The USB5742B can be configured for operation through internal default settings. Custom OEM configurations are sup-

ported through external SPI ROM or OTP ROM. All port control signal pins are under firmware control in order to allow

for maximum operational flexibility, and are available as GPIOs for customer specific use.

The USB5742B is available in commercial (0°C to +70°C) and industrial (-40°C to +85°C) temperature range. An internal

block diagram of the USB5742B is shown in Figure 2-1.

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