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RHFLVDSR2D2 データシート(PDF) 11 Page - STMicroelectronics |
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RHFLVDSR2D2 データシート(HTML) 11 Page - STMicroelectronics |
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11 / 17 page ![]() DocID025372 Rev 3 11/17 RHFLVDSR2D2 Test circuit for the receiver 17 6 Test circuit for the receiver Figure 5. Timing test circuit and waveforms 1. All input pulses are supplied by a generator with the following characteristics: tr or tf ≤ 1 ns, f = 1 MHz, ZO = 50 Ω, and duty cycle = 50%. 2. The product is guaranteed in test with CL = 10 pF. VIN+ VIN- tPHLD tPLHD tf VO tr 80% 20% 80% 20% 50% 50% VID=200mVp-p LVDS Receiver VCM=(VIN+ + VIN-)/2 VID VIN+ VIN- IN+ IN- II VO 10pF |
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