L9960 datasheet(85/95 Pages) STMICROELECTRONICS

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#7a

1 1 1

configuration request 1

#7b

1 1 1

configuration request 2

#7c

1 1 1

configuration request 3

#7d

1 1 1

configuration request 4

#7e

1 1 1

configuration request 5

#8a

0 0 0

states request 1

#8b

0 0 0

states request 2

#8c

0 0 0

states request 3

0 0 1

TRIG (0)

OFF STATE diagnosis

#10a(6) 1

0 1 0

Reserved

#10b(6) 1

0 1 0

Reserved

#11(6)

0 1 1

Reserved

#12a

1 0 0

All '0's (D10:D0), parity bit (1)

Reserved

#12b

1 0 0

'00000000001' + parity bit at 0

Reserved

#13a

101

component traceability

number request 1

#13b

101

component traceability

number request 2

#14

1 1 0

Reserved

#15a

1 1 1

electronic id request

#15b

1 1 1

silicon version request

#15c

1 1 1

Logic HW version request

1. Command frame '0' is not used.

2. In command frames 1, 2, 4 and 5 the bitfileds set to '0' must be respected otherwise internal logic will discard the command.

These bits are consequently used as internal cross-check by logic on valid address for correct frame processing

3. D[1] BITFIELD IN SPI COMMAND #3 must be kept at 1.

4. D[1] bitfield in SPI command #4 must be kept at 0.

5. After POR or SW reset, D[8]..D[0] bitfield is set at ' 0_0111_1101 '. This POR value is not processed by the logic as whatever further configuration. This bitfield status is

mirrored in bitfield R[9]..R[1] in answer frame #7d.

6. Frame 10a, 10b and 11 are reserved SPI command frames for ATE. If sent by, the SDO response will be the error frame 0x0000h.

Table 98. SPI communication command and answer words (continued)

Word

Address

D10

Parity

bit

ON state

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