L99DZ200G datasheet(53/198 Pages) STMICROELECTRONICS

53 / 198 page

DS13220 Rev 5

53/198

L99DZ200G

Electrical specifications

197

Note:

CAN Normal and Low Power mode, biasing active: Tested in TRX Ready and TRX BIAS

state while the device is in active and V1 Standby mode.

Table 40. CAN receiver input resistance biasing active

Item

Symbol

Parameter

Test condition

Min.

Typ.

Max.

Unit

E.040

Rdiff

Differential internal

resistance

TRX Ready & TRX BIAS states;

VTXDC = VTXDCHIGH; no load

100

kΩ

E.041

RCANH,

CANL

Single ended

Internal resistance

TRX Ready & TRX BIAS states;

VTXDC = VTXDCHIGH; no load

kΩ

E.042

InternalResistance

matching

RCANH,CANL

TRX Ready & TRX BIAS states;

VTXDC = VTXDCHIGH; no load; mR = 2

x (RCAN_H - RCAN_L) / (RCAN_H +

RCAN_L)

-0.03

0.03

E.043

Cin

Internal

capacitance

Guaranteed by design

E.044

Cin,diff

Differential internal

capacitance

Guaranteed by design

Table 41. CAN transceiver delay

Item

Symbol

Parameter

Test condition

Min.

Typ.

Max.

Unit

E.045

tTXpd,hl

Loop delay TxD_C

to RxD_C (High to

Low)

RL = 60 Ω; CL = 100 pF; 30% VTXDC –

30% VRXDC;

TXDC fall time = 10 ns (90% - 10%);

CRXDC = 15 pF; fTXDC = 250 kHz

255

E.046

tTXpd,lh

Loop delay TxD_C

to RxD_C (Low to

High)

RL = 60Ω; CL = 100pF; 70% VTXD –

70% VRXD;

TXDC rise time = 10 ns (10% - 90%);

CRXDC = 15 pF; fTXDC = 250 kHz

255

E.047

TBitrec

Recessive Bit

symmetry

RL = 60 Ω; CL = 100 pF;

70% VTXDC (rising) - 30% VRXDC

(falling); CRXD = 15 pF; 10 ns (10% -

90%, 90% - 10%); Rectangular pulse

signal TTXDC = 6000 ns, high pulse

1000 ns, low pulse 5000 ns

765

1000

1255

E.048

tCAN

CAN permanent

dominant time-out

Tested by scan

500

700

1000

μs

E.049

tWUP-V1(1)

Time between

WUP(2) on the

CAN bus until V1

goes active

Wake-Up according to

ISO11898- 5:2007;

70% VDIFF – 90% V1(min)

200

µs

1. Guaranteed by characterization.

2. Time starts with the end of last dominant phase of the WUP.

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