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L99MOD51XP データシート(PDF) 14 Page - STMicroelectronics

部品番号 L99MOD51XP
部品情報  Multi-output driver for automotive applications
PDF  33 Pages
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メーカー  STMICROELECTRONICS [STMicroelectronics]
ホームページ  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

L99MOD51XP データシート(HTML) 14 Page - STMicroelectronics

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SPI - electrical characteristics
L99MOD51XP
14/33
DS12667 Rev 6
3
SPI - electrical characteristics
(VS = 8 to 16 V, VCC = 4.5 to 5.3 V, Tj = - 40 to 150 °C, unless otherwise specified. The
voltages are referred to GND and currents are assumed positive, when the current flows
into the pin).
Table 12. Delay time from standby to active mode
Symbol
Parameter
Test condition
Min.
Typ.
Max.
Unit
tset
Internal startup time
Switching from standby to
active mode. Time until not
Ready Bit goes low.
80
300
μs
Table 13. Inputs: CSN, CLK, PWM1/2 and DI
Symbol
Parameter
Test condition
Min.
Typ.
Max.
Unit
VinL
Input low level
VCC = 5 V
1.5
2.0
V
VinH
Input high level
VCC = 5 V
3.0
3.5
V
VinHyst
Input hysteresis
VCC = 5 V
0.5
V
ICSN in
Pull up current at input CSN
VCSN = 3.5 V VCC = 5 V
-50
-25
-10
μA
ICLK in
Pull down current at input CLK
VCLK = 1.5 V
10
25
50
μA
IDI in
Pull down current at input DI
VDI = 1.5 V
10
25
50
μA
IEN in
Pull down resistance at input EN
100
210
480
k
C in (1)
Input capacitance at input CLK, DI
and PWM
VCC = 0 to 5.3 V
10
15
pF
1. Value of input capacity is not measured in production test. Parameter guaranteed by design.
Table 14. DI timing
Symbol
Parameter
Test condition
Min.
Typ.
Max.
Unit
tCLK
Clock period
VCC = 5 V
1000
ns
tCLKH
Clock high time
VCC = 5 V
400
ns
tCLKL
Clock low time
VCC = 5 V
400
ns
tset CSN
CSN setup time, CSN low before
rising edge of CLK
VCC = 5 V
400
ns
tset CLK
CLK setup time, CLK high before
rising edge of CSN
VCC = 5 V
400
ns
tset DI
DI setup time
VCC = 5 V
200
ns
thold time
DI hold time
VCC = 5 V
200
ns
tr in
Rise time of input signal DI, CLK,
CSN
VCC = 5 V
100
ns
tf in
Fall time of input signal DI, CLK,
CSN
VCC = 5 V
100
ns



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