MIC2133 datasheet(27/50 Pages) MICROCHIP

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DS20006653B-page 27

MIC2133

FIGURE 4-13:

External Programmable VIN

UVLO Connections.

4.5.7

SOFT START

Soft start reduces the power supply input surge current

at start-up by controlling the output voltage rise time.

The input surge appears while the output capacitor is

charged up. A slower output rise time will draw a lower

input surge current.

The MIC2133 features an adjustable soft start time.

The soft start time can be adjusted by changing the

value of the capacitor connected from the SS pin to

AGND. The soft start time can be adjusted from 5 ms

to 100 ms. The MIC2133 forces 1.2 µA current from the

SS pin. This constant current flows through the soft

start capacitor, connected from the SS pin to AGND, to

adjust the soft start time.

The soft start capacitor value for the desired VOUT

ramp-up time can be calculated from the following

equation.

EQUATION 4-22:

4.5.8

VDD REGULATOR AND EXTVDD

LDO

The MIC2133 has an integrated high-voltage LDO that

provides a 5V regulated output from Input Voltage, VIN,

ranging from 8V to 75V. When VIN < 5.5V, VDD must be

tied to the VIN pins to bypass the internal linear regula-

tor. The internal LDO powers the control circuitry from

the VDD pin and gate drive current from the PVDD pin.

The MIC2133 also features an auxiliary low-voltage

LDO, which is powered by EXTVDD. When the voltage

on the EXTVDD is at 4.7V (typical) or higher, this

auxiliary LDO is enabled and powers all the internal

circuitry. At the same time, the main high-voltage LDO

is disabled. This increases the efficiency of the system

by reducing the differential voltage across the high-

voltage LDO, hence reducing the power losses in the

LDO. In general, the output of the buck converter is

used as the power supply for the auxiliary LDO by

connecting the EXTVDD pin to the output of the buck

converter. The maximum voltage that can be applied at

the EXTVDD is limited to 14V. The following figure

shows the internal 5V LDO and EXTVDD connection in

the MIC2133.

FIGURE 4-14:

MIC2133 EXTVDD.

Given that the EXTVDD is powered from the VOUT of

the buck regulator, the VOUT is noisy if there is a fast

changing load. When VOUT > 5V + VDROPOUT, the

noise could be suppressed by a loop of the 12V LDO.

However, when VOUT = 5V, the 12V LDO works in

Dropout mode and there is no loop gain. The LDO acts

just like a resistor. It is not recommended that EXTVDD

be connected to VOUT if VOUT < 5V.

4.5.9

POWER GOOD (PG)

The Power Good (PG) pin is an open-drain output,

which indicates logic high when the output is nominally

over 88% of its steady-state voltage. It is recommended

that a pull-up resistor of more than 10 kΩ be connected

from PG to VDD. During soft start, the PG is held low

and is allowed to be pulled high after VOUT is achieved

over 88% of the target level.

4.5.10

SEQUENCING

The MIC2133 has a precision enable function. The EN

pin voltage will either enable/disable switching. When

the EN pin voltage is higher than 1.2V (typical), the

MIC2133 is put into operation. The internal regulator

will power up and start switching. The following figure

shows the EN pin sequencing.

MIC2133

RBOT

VIN

RTOP

1.2

At



VREF

----------------------------

Where:

tSS = Output Voltage Soft Start Ramp-up Time

HV LDO

4.7V

VIN

EXTVDD

12V LDO

with reverse

blocking

OUT

VDD

OUT

2.2 ohm

2.2 μF

4.7 μF

PVDD

PGND

AGND

MIC2133 REG_ With EXTVDD

HV LDO

OUT

VIN

2 ohm

2.2 μF

4.7 μF

VDD

AGND

PGND

PVDD

MIC2133 REG_Internal 5V block

Bypass_B

Bypass

VDD bypass

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