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SST26VF032BEUI データシート(PDF) 26 Page - Microchip Technology

部品番号 SST26VF032BEUI
部品情報  32 Mbit Serial Quad I/O (SQI) Flash Memory with EUI-48™ and EUI-64™ Identifier
PDF  76 Pages
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メーカー  MICROCHIP [Microchip Technology]
ホームページ  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

SST26VF032BEUI データシート(HTML) 26 Page - Microchip Technology

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SST26VF032BEUI
DS20006152A-page 26
 2019 Microchip Technology Inc.
5.19
Chip-Erase
The Chip-Erase instruction clears all bits in the device
to ‘1.’ The Chip-Erase instruction is ignored if any of the
memory area is protected. Prior to any write operation,
execute the WREN instruction.
To execute a Chip-Erase operation, the host drives
CE# low, sends the Chip-Erase command cycle (C7H),
then drives CE# high. Poll the BUSY bit in the Status
register, or wait TSCE, for the completion of the internal,
self-timed, Write operation. See Figures 5-23 and 5-24
for the Chip Erase sequence.
FIGURE 5-23:
CHIP-ERASE SEQUENCE (SQI)
FIGURE 5-24:
CHIP-ERASE SEQUENCE (SPI)
20005218 F09.1
MODE 3
0
1
SCK
SIO(3:0)
CE#
C1 C0
MODE 0
Note: C[1:0] = C7H
CE#
SO
SI
SCK
01 2 3 4 5 6 7
C7
HIGH IMPEDANCE
MODE 0
MODE 3
20005218 F59.0
MSB



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