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SST26VF032BEUI データシート(PDF) 33 Page - Microchip Technology

部品番号 SST26VF032BEUI
部品情報  32 Mbit Serial Quad I/O (SQI) Flash Memory with EUI-48™ and EUI-64™ Identifier
PDF  76 Pages
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メーカー  MICROCHIP [Microchip Technology]
ホームページ  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

SST26VF032BEUI データシート(HTML) 33 Page - Microchip Technology

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 2019 Microchip Technology Inc.
DS20006152A-page 33
SST26VF032BEUI
5.32
Write-Disable (WRDI)
The Write-Disable (WRDI) instruction sets the Write-
Enable-Latch bit in the Status register to ‘0,’ preventing
Write operations. The WRDI instruction is ignored
during any internal write operations. Any Write opera-
tion started before executing WRDI will complete. Drive
CE# high before executing WRDI.
To execute a Write-Disable, the host drives CE# low,
sends the Write Disable command cycle (04H), then
drives CE# high. See Figures 5-34 and 5-35.
FIGURE 5-34:
WRITE-DISABLE (WRDI) SEQUENCE (SQI)
FIGURE 5-35:
WRITE-DISABLE (WRDI) SEQUENCE (SPI)
20005218 F33.1
MODE 3
0
1
SCK
SIO(3:0)
CE#
04
MODE 0
CE#
SO
SI
SCK
01 2 3 4 5 6 7
04
HIGH IMPEDANCE
MODE 0
MODE 3
20005218 F19.0
MSB



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