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LPS22HHTR データシート(PDF) 45 Page - STMicroelectronics |
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LPS22HHTR データシート(HTML) 45 Page - STMicroelectronics |
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45 / 59 page ![]() DocID030890 Rev 2 45/59 LPS22HH Register description 59 9.7 CTRL_REG2 (11h) Control register 2 (R/W) The BOOT bit is used to refresh the content of the internal registers stored in the Flash memory block. At device power-up, the content of the Flash memory block is transferred to the internal registers related to the trimming functions to allow correct behavior of the device itself. If for any reason the content of the trimming registers is modified, it is sufficient to use this bit to restore the correct values. When the BOOT bit is set to '1', the content of the internal Flash is copied into the corresponding internal registers and is used to calibrate the device. These values are factory trimmed and they are different for every device. They allow the correct behavior of the device and normally they should not be changed. At the end of the boot process, the BOOT bit is set again to '0' by hardware. The BOOT bit takes effect immediately after it is set to 1. INT_H_L selects an interrupt active-high/low value. PP_OD selects push-pull/open-drain on the interrupt pad. The IF_ADD_INC bit enables the address to be automatically incremented during a multiple byte access with a serial interface (SPI or I²C). The SWRESET bit resets the volatile registers to default value ‘0’. It returns to ‘0’ by hardware. 76 5 4 3 2 1 0 BOOT INT_H_L PP_OD IF_ADD_INC 0 SWRESET LOW_NOISE_EN ONE_SHOT BOOT Reboots memory content. Default value: 0 (0: normal mode; 1: reboot memory content) INT_H_L Interrupt active-high, active-low. Default value: 0 (0: active high; 1: active low) PP_OD Push-pull/open-drain selection on interrupt pad. Default value: 0 (0: push-pull; 1: open-drain) IF_ADD_INC Register address automatically incremented during a multiple byte access with a serial interface (I²C or SPI). Default value: 1 (0: disable; 1: enable) SWRESET Software reset. Default value: 0 (0: normal mode; 1: software reset). The bit is self-cleared when the reset is completed. LOW_NOISE_EN Enables low noise (used only if ODR is lower than 100 Hz). Default value: 0 (0: low-current mode; 1: low-noise mode) ONE_SHOT Enables one-shot. Default value: 0 (0: idle mode; 1: a new dataset is acquired) |
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