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HC08KL8GRS/D データシート(PDF) 76 Page - NXP Semiconductors

部品番号 HC08KL8GRS/D
部品情報  High-Performance M68HC08 Architecture
PDF  256 Pages
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メーカー  NXP [NXP Semiconductors]
ホームページ  http://www.nxp.com
Logo NXP - NXP Semiconductors

HC08KL8GRS/D データシート(HTML) 76 Page - NXP Semiconductors

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Oscillator
General Release Specification
MC68HC08KL8 — Rev. 2.0
Oscillator
7.4.5 Oscillator Out (CGMOUT)
The clock driven to the SIM is the crystal frequency divided by two. This
signal is driven to the SIM for generation of the bus clocks used by the
CPU and other modules on the MCU. CGMOUT will be divided again in
the SIM and results in the internal bus frequency being one fourth of the
CGMXCLK frequency.
7.5 Low-Power Modes
The WAIT and STOP instructions put the MCU in low-power standby
modes.
7.5.1 Wait Mode
The WAIT instruction has no effect on the oscillator logic. CGMXCLK
continues to drive to the SIM module.
7.5.2 Stop Mode
The STOP instruction disables the CGMXCLK output.
7.6 Oscillator During Break Mode
The oscillator continues to drive CGMXCLK when the chip enters the
break state.
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com



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