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STM32H7B0IB データシート(PDF) 145 Page - STMicroelectronics |
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STM32H7B0IB データシート(HTML) 145 Page - STMicroelectronics |
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145 / 205 page  Figure 51. Channel transceiver timing diagrams SITP = 0 SITP = 1 tsu th tsu th tf tr twl twh recovered clock SITP = 2 SITP = 3 recovered data 1 1 0 0 0 SITP = 00 SITP = 01 tsu th tsu th tf tr twl twh SPICKSEL=2 SPICKSEL=1 (SPICKSEL=0) SPICKSEL=3 6.3.31 Camera interface (DCMI) timing specifications Unless otherwise specified, the parameters given in Table 107. DCMI characteristics for DCMI are derived from tests performed under the ambient temperature, fHCLK frequency and VDD supply voltage summarized in Table 20. General operating conditions and Section 6.3.1 , with the following configuration: • DCMI_PIXCLK polarity: falling • DCMI_VSYNC and DCMI_HSYNC polarity: high STM32H7B0xB Operating conditions DS13196 - Rev 7 page 145/205 |
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