M5451 datasheet(3/8 Pages) STMICROELECTRONICS

3 / 8 page

At the low state of the clock a RESET signal is

generated which clears all the shift registers for the

next set of data. The shift registers are static mas-

ter-slave configurations. There is no clear for the

master portion of the first shift register, thus allow-

ing continuous operation.

There must be a complete set of 36 clocks or the

shift registers will not clear.

When power is first applied to the chip an internal

power ON reset signal is generated which resets

all registers and all latches. The START bit and the

first clock return the chip to its normal operation.

Bit 1 is the first bit following the start bit and it will

appear on Pin 18. A logical "1" at the input will turn

on the appropriate LED.

Figure 3 shows the timing relationship between

Data, Clock and DATA ENABLE.

A max clock frequency of 0.5MHz is assumed.

For applications where a lesser number of outputs

are used, it is possible to either increase the current

per output or operate the part at higher than 1V

VOUT.

The following equation can be used for calcula-

tions.

Tj = [(VOUT) (ILED) (No. of segments) + (VDD

⋅ 7mA)]

(124

°C/W) + Tamb

where :

Tj = junction temperature (150

°C max)

VOUT = the voltage at the LED driver outputs

ILED = the LED current

124

°C/W = thermal coefficient of the package

Tamb = ambient temperature

The above equation was used to plot Figures 4, 5

and 6.

STATIC ELECTRICAL CHARACTERISTICS

(Tamb within operating range, VDD = 4.75V to 13.2V, VSS = 0V, unless otherwise specified)

Symbol

Parameter

Test Conditions

Min.

Typ.

Max.

Unit

VDD

Supply Voltage

4.75

13.2

IDD

Supply Current

VDD = 13.2V

Input Voltage

Logical "0" Level

Logical "1" Level

± 10µA Input Bias

4.75

≤ VDD ≤ 5.25

VDD > 5.25

- 0.3

2.2

VDD - 2

0.8

VDD

Brightness Input Current (note 2)

0.75

Brightness Input Voltage (pin 19)

Input Current = 750

µA,

Tamb = 25

4.3

VO(off)

Off State Out. Voltage

13.2

Out. Sink Current (note 3)

Segment OFF

Segment ON

VO = 3V

VO = 1V (note 4)

Brightness In. = 0

µA

Brightness In. = 100

µA

Brightness In. = 750

µA

2.7

µA

fclock

Input Clock Frequency

0.5

MHz

Output Matching (note 1)

± 20

Notes : 1. Output matching is calculated as the percent variation from IMAX + IMIN/2.

2. With a fixed resistor on the brightness input some variation in brightness will occur from one device to another.

3. Absolute maximum for each output should be limited to 40mA.

4. The VO voltage should be regulated by the user. See figures 5 and 6 for allowable VO versus IO operation.

M5450 - M5451

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