IDT®

Two Output Differential Buffer for PCIe Gen1 & Gen2

852

REV Q 08/27/13

ICS9DB102

Two Output Differential Buffer for PCIe Gen1 & Gen2

9

SMB us Table: Device C ontrol Register, READ /WRITE ADDR ESS (D4/D5)

Pin #

Name

Control Function Type

0

1

PWD

Bit 7

SW_EN

Enables SMBus

Control

RW

Functions

controlled by

SMBus

registers

Functions

controlled by

device pins

1

Bit 6

RW

X

Bit 5

RW

X

Bit 4

RW

X

Bit 3

RW

X

Bit 2

RW

X

Bit 1

PLL BW #adjust

Selects PLL

Bandwidth

R W

Low BW

High BW

1

Bit 0

PLL Enable

Bypasses PLL for

board test

RW

PLL bypassed

(fan out mode)

PLL enabled

(ZDB mode)

1

SMB us Table: Output Enable Register

Pin #

Name

Control Function Type

0

1

PWD

Bit 7

RW

X

Bit 6

RW

X

Bit 5

RW

X

Bit 4

RW

X

Bit 3

RW

X

Bit 2

RW

X

Bit 1

RW

X

Bit 0

RW

X

SMB us Table: Function Select Register

Pin #

Name

Control Function Type

0

1

PWD

Bit 7

RW

X

Bit 6

RW

X

Bit 5

RW

X

Bit 4

RW

X

Bit 3

RW

X

Bit 2

RW

X

Bit 1

RW

X

Bit 0

RW

X

SMB us Table: Vendor & Revision ID Register

Pin #

Name

Control Function Type

0

1

PWD

Bit 7

RID3

R

-

-

0

Bit 6

RID2

R

-

-

0

Bit 5

RID1

R

-

-

0

Bit 4

RID0

R

-

-

1

Bit 3

VID 3

R

-

-

0

Bit 2

VID 2

R

-

-

0

Bit 1

VID 1

R

-

-

0

Bit 0

VID 0

R

-

-

1

RESERVED

-

-

RESERVED

-

RESERVED

-

-

-

-

-

-

-

-

-

Byte 3

-

-

-

-

-

-

Byte 2

RESERVED

-

RESERVED

-

-

-

-

-

-

-

-

RESERVED

-

RESERVED

-

-

Byte 1

-

RESERVED

-

-

RESERVED

REVISION ID

VENDOR ID

Byte 0

-

-

RESERVED

-

RESERVED

-

-

-

RESERVED

-

RESERVED

RESERVED

-

RESERVED

-

RESERVED

-

-

-

RESERVED

-

RESERVED

-

-

RESERVED

-

RESERVED

RESERVED

-

-