UJA1069 datasheet(19/64 Pages) PHILIPS

19 / 64 page

UJA1069_2

Preliminary data sheet

Rev. 02 — 5 March 2007

19 of 64

NXP Semiconductors

UJA1069

LIN fail-safe system basis chip

6.7.1.1

Active mode

In Active mode the LIN transceiver can transmit data to and receive data from the LIN bus.

To enter Active mode the LMC bit must be set in the Physical Layer register and the SBC

must be in Normal mode or Flash mode.

The LTC bit can be used to set the LIN transceiver to a Listen-only mode. The transmitter

output stage is disabled in this mode.

When leaving Active mode the LIN transmitter is disabled and the LIN receiver is

monitoring the LIN-bus for a valid wake-up.

6.7.1.2

Off-line mode

Off-line mode is the low-power mode of the LIN transceiver. The LIN transceiver is

disabled to save supply current. Pin RXDL reﬂects any wake-up event at the LIN-bus.

6.7.2 LIN wake-up

For a remote wake-up via LIN a LIN-bus signal is required as shown in Figure 10.

Fig 9.

States LIN transceiver

001aad184

power-on

Active mode

transmitter: ON/OFF (LTC)

receiver: ON

RXDL: bitstream

RTLIN: ON/75

µA

Off-line mode

transmitter: OFF

receiver: wake-up

RXDL: wake-up status

RTLIN: 75

µA/OFF

SBC enters

Stand-by, Start-up,

Restart or Fail-safe mode

OR LMC = 0

SBC enters

Normal or Flash mode

AND LMC = 1

SBC enters

Fail-safe mode

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