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M49000000P データシート(PDF) 30 Page - Advanced Micro Devices

部品番号 M49000000P
部品情報  32 Megabit (4 M x 8-Bit/2 M x 16-Bit) CMOS 3.0 Volt-only, Simultaneous Operation Flash Memory and 32 Mbit (2M x 16-Bit)
PDF  64 Pages
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メーカー  AMD [Advanced Micro Devices]
ホームページ  http://www.amd.com
Logo AMD - Advanced Micro Devices

M49000000P データシート(HTML) 30 Page - Advanced Micro Devices

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July 19, 2002
Am49DL32xBG
29
P R E L I M I NARY
DQ7, DQ6, DQ2, or RY/BY# in the erasing bank.
Refer to the Write Operation Status section for infor-
mation on these status bits.
Once the sector erase operation has begun, only the
Erase Suspend command is valid. All other com-
mands are ignored. However, note that a hardware
reset immediately terminates the erase operation. If
that occurs, the sector erase command sequence
should be reinitiated once that bank has returned to
reading array data, to ensure data integrity.
Figure 4 illustrates the algorithm for the erase opera-
tion. Refer to the Erase and Program Operations
tables in the AC Characteristics section for parame-
ters, and Figure 20 section for timing diagrams.
Erase Suspend/Erase Resume
Commands
The Erase Suspend command, B0h, allows the sys-
tem to interrupt a sector erase operation and then read
data from, or program data to, any sector not selected
for erasure. The bank address is required when writing
this command. This command is valid only during the
sector erase operation, including the 50 µs time-out
period during the sector erase command sequence.
The Erase Suspend command is ignored if written dur-
ing the chip erase operation or Embedded Program
algorithm.
When the Erase Suspend command is written during
the sector erase operation, the device requires a max-
imum of 20 µs to suspend the erase operation.
However, when the Erase Suspend command is writ-
ten during the sector erase time-out, the device
immediately terminates the time-out period and sus-
pends the erase operation.
After the erase operation has been suspended, the
bank enters the erase-suspend-read mode. The sys-
tem can read data from or program data to any sector
not selected for erasure. (The device “erase sus-
pends” all sectors selected for erasure.) Reading at
any address within erase-suspended sectors pro-
duces status information on DQ7–DQ0. The system
can use DQ7, or DQ6 and DQ2 together, to determine
if a sector is actively erasing or is erase-suspended.
Refer to the Write Operation Status section for infor-
mation on these status bits.
After an erase-suspended program operation is com-
plete, the bank returns to the erase-suspend-read
mode. The system can determine the status of the
program operation using the DQ7 or DQ6 status bits,
just as in the standard Byte Program operation.
Refer to the Write Operation Status section for more
information.
In the erase-suspend-read mode, the system can also
issue the autoselect command sequence. Refer to the
Autoselect Mode and Autoselect Command Sequence
sections for details.
To resume the sector erase operation, the system
must write the Erase Resume command. The bank
address of the erase-suspended bank is required
when writing this command. Further writes of the Re-
sume command are ignored. Another Erase Suspend
command can be written after the chip has resumed
erasing.
Figure 4.
Erase Operation
START
Write Erase
Command Sequence
(Notes 1, 2)
Data Poll to Erasing
Bank from System
Data = FFh?
No
Yes
Erasure Completed
Embedded
Erase
algorithm
in progress
Notes:
1. See Tables 15 and 16 for erase command sequence.
2. See the section on DQ3 for information on the sector
erase timer.



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