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USB2224 データシート(PDF) 9 Page - SMSC Corporation |
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USB2224 データシート(HTML) 9 Page - SMSC Corporation |
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9 / 20 page ![]() Bus Powered USB2.0 Flash Media Controller Datasheet SMSC USB2224 Page 9 Revision 1.3 (06-13-06) DATASHEET Chapter 5 Block Diagram USB 2.0 PHY ( Transciever ) FAST 8051 CPU CORE GPIO 15 pins Configuration and Control Clock Generation SIE ( Serial Interface Engine ) Program Memory/ IO Bus Interrupt Controller Latch phase 0, 2 SIE Latch phase 3 8051 Latch phase 1 FMC 60MHz 32 Bit Osc Address 64 Bytes EP0TX 64 Bytes EP0RX 64 Bytes EP1TX 64 Bytes EP1RX Auto address generators Data @ 32 bit 15Mhz SIE Control Regs Address Address Address Address EP0RX_BC RAMRD_A/B EP0TX_BC RAMWR_A/B 32 bit 15MHz Data Buss CLOCKOUT 12 MHz 512 Bytes EP2 TX/RX Buffer A 1.25KB SRAM 12K Byte Scratchpad SRAM Clocked byPhase 0, 2 Clock Clocked by Phase 3 Clock 512 Bytes EP2 TX/RX Buffer B Memory Cards Scratchpad SRAM (768 Byte) ECC Control/ Status SD Controller SD/HS SD/ MMC Flash Media Controllers (FMC) Control/ Status MS Controller MS/HS MS/MS PRO Control/ Status SM Controller SM/SSFDC Control/ Status CF Controller CF Control/ Status CRC MEM/IO Bus 29pins DATA DATA DATA DATA CRC EP1TX_BC EP1RX_BC Address Address Flash Media DMA Unit 64K ROM ROMEN |
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