LTM4650-2 datasheet(22/36 Pages) AD

22 / 36 page

LTM4650-2

Rev. 0

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practical realities—an approach has been taken using

FEA software modeling along with laboratory testing in a

controlled-environment chamber to reasonably define and

correlate the thermal resistance values supplied in this

data sheet: (1) Initially, FEA software is used to accurately

build the mechanical geometry of the µModule and the

specified PCB with all of the correct material coefficients

along with accurate power loss source definitions; (2)

this model simulates a software-defined JEDEC environ-

ment consistent with JSED51-9 to predict power loss heat

flow and temperature readings at different interfaces that

enable the calculation of the JEDEC-defined thermal resis-

tance values; (3) the model and FEA software is used

to evaluate the µModule with heat sink and airflow; (4)

having solved for and analyzed these thermal resistance

values and simulated various operating conditions in

the software model, a thorough laboratory evaluation

replicates the simulated conditions with thermocouples

within a controlled-environment chamber while operat-

ing the device at the same power loss as that which was

simulated. An outcome of this process and due diligence

yields a set of derating curves provided in other sections

of this data sheet. After these laboratory tests have been

performed and correlated to the µModule model, then the

θJB and θBA are summed together to correlate quite well

with the µModule model with no airflow or heat sinking

in a properly defined chamber. This θJB + θBA value is

shown in the Pin Configuration section and should accu-

rately equal the θJA value because approximately 100%

of power loss flows from the junction through the board

into the ambient with no airflow or top-mounted heat sink.

Each system has its own thermal characteristics, there-

fore thermal analysis must be performed by the user in

a particular system.

The LTM4650-2 module has been designed to effectively

remove heat from both the top and bottom of the pack-

age. The bottom substrate material has very low thermal

resistance to the printed circuit board. An external heat

sink can be applied to the top of the device for excellent

heat sinking with airflow.

Figure 12 shows a temperature plot of the LTM4650-2

with 12V input, 1.0V output at 50A without a heat sink

and a no airflow condition.

APPLICATIONS INFORMATION

Figure 12. Thermal Image 12V to 1V, 50A with No Airflow and

No Heat Sink (Based on 4-Layer 101mm × 114mm PCB Board

Containing 2oz Copper on the Top, Bottom and All Internal Layers)

Safety Considerations

The LTM4650-2 modules do not provide isolation from

VIN to VOUT. There is no internal fuse. If required, a slow

blow fuse with a rating twice the maximum input cur-

rent needs to be provided to protect each unit from cata-

strophic failure. The device does support over current

protection. A temperature diode is provided for monitor-

ing internal temperature, and can be used to detect the

need for thermal shutdown that can be done by control-

ling the RUN pin.

Power Derating

The 0.9V and 1.5V power loss curves in Figure 13 and

Figure 14 can be used in coordination with the load cur-

rent derating curves in Figure 15 to Figure 22 for cal-

culating an approximate θJA thermal resistance for the

LTM4650-2 with various heat sinking and airflow condi-

tions. The power loss curves are taken at room tempera-

ture, and are increased with a 1.2 multiplicative factor

at 120°C.

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