KF2 datasheet(20/29 Pages) ETC

20 / 29 page

©NEC Electronics Corporation 2004

78K0/KF2

ZUD-CC-04-0129-E

Data Published Oct 2004 N CP(K)

(d) 3-wire serial I/O mode (CSI10, CSI11

master mode, SCK1n

…internal clock output)

Parameter

Symbol

Conditions

MIN.

TYP.

MAX.

Unit

4.0 V

≤ VDD ≤ 5.5 V

100

SCK1n cycle time

tKCY1

2.7 V

≤ VDD < 4.0 V

200

SCK1n high-/low-level width

tKH1,

tKL1

tKCY1/2 - 10

Not1

SI1n setup time (to SCK1n

↑)

tSIK1

SI1n hold time (to SCK1n

↑)

tKSI1

Delay time from SCK1n

↓ to SO1n

output

tKSO1

C = 50 pF

Note2

Notes 1. This is the value when the high-speed system clock (fXH) is operating.

C is the load capacitance of the SCK1n and SO1n output lines.

(e) 3-wire serial I/O mode (CSI10, CSI11

slave mode, SCK1n

…external clock input)

Parameter

Symbol

Conditions

MIN.

TYP.

MAX.

Unit

SCK1n cycle time

tKCY2

400

SCK1n high-/low-level width

tKH2,

tKL2

T.B.D

SI1n setup time (to SCK1n

↑)

tSIK2

SI1n hold time (to SCK1n

↑)

tKSI2

Delay time from SCK1n

↓ to SO1n

output

tKSO2

C = 50 pF

Note

120

Note

C is the load capacitance of the SO1n output lines.

Remark

n = 0, 1

Caution

Specification at 1.8 V ≤ VDD < 2.7V is not fixed.

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