PCF8535 datasheet(15/52 Pages) PHILIPS

15 / 52 page

1999 Aug 24

Philips Semiconductors

Objective speciﬁcation

× 133 pixel matrix driver

PCF8535

7.15

Addressing

Addressing of the RAM can be split into two parts; input

addressing and output addressing. Input addressing is

concerned with writing data into the RAM. Output

addressing is almost entirely automatic and taken care of

by the device, however, it is possible to affect the output

mode.

7.15.1

INPUT ADDRESSING

Data is down loaded byte wise into the RAM matrix of the

PCF8535 as indicated in Figs 6 to 10.

The display RAM has a matrix of 65

× 133 bits.

The columns are addressed by a combination of the

X address pointer and the X-RAM page pointer, whilst the

rows addressed in groups of 8 by the Y address pointer.

The X address pointer has a range of 0 to 127 (7FH).

Its range can be extended by the X-RAM page pointer,

XM0. The Y address pointer has a range of 0 to 8 (08H).

The PCF8535 is limited to 133 columns by 65 rows,

addressing the RAM outside of this area is not allowed.

Table 8

Effect of X-RAM page pointer

X ADDRESS POINTER

X-RAM PAGE POINTER

XM0

ADDRESSED COLUMN

MX = 0

ADDRESSED COLUMN

MX = 1

C132

C131

C130

::::

125

C125

126

C126

127

C127

C128

C129

::::

C132

handbook, full pagewidth

MGS673

MSB

LSB

Banks 1 to 7 use

the entire byte

Bank 8 is only

1 bit deep and

uses the MSB

XM0 = 1

XM0 = 0

.. ..

LSB

MSB

X address

icon data

Fig.6 RAM format, input addressing.

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