TMG3992 datasheet(66/96 Pages) OSRAM

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ams Datasheet

Page 65

[v1-06] 2018-Feb-27

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TMG3992 − Register Description

Configuration Register A3 (CONFIG_A3),

IRBeam Mode

While IRBeam is enabled, this register defines the length of time

that the LDR pin is disabled (I.e. LED is turned OFF) between

consecutive symbol loops.

The following equation governs the time delay:

The minimum typical Inter-Symbol LED OFF time is 0.54 μs. The

maximum typical Inter-Symbol LED OFF time is 8.8 ms.

Figure 67:

Configuration Register A3

Configuration Register A4 (CONFIG_A4),

IRBeam Mode

While IRBeam is enabled, this register defines the number of

times a complete Packet is burst out of the LDR pin. A Packet

can be conceptualized as a “container” for a number of

complete Symbol Loops. The following equation describes the

calculation of the Number of Packet Loops as a function of

Number of Packet Loops = IPNL + 1

Figure 68:

Configuration Register A4

765

432

ISOFF

Field

Bits

Description

ISOFF

7:0

Sets the amount of LED Off time between Symbols. Sets the delay

between symbol bursts.

765

432

IPNL

Field

Bits

Description

IPNL

7:0

IRBeam Number of Packet Loops. Number of Loops.

(EQ6)

tISDT

2 ISOFF

() 1

[] tIBT

(EQ7)

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