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MCP23017-E/ML データシート(PDF) 4 Page - Microchip Technology

部品番号 MCP23017-E/ML
部品情報  16-Bit I/O Expander with Serial Interface
PDF  48 Pages
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メーカー  MICROCHIP [Microchip Technology]
ホームページ  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

MCP23017-E/ML データシート(HTML) 4 Page - Microchip Technology

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MCP23017/MCP23S17
DS21952B-page 4
© 2007 Microchip Technology Inc.
1.1
Pin Descriptions
TABLE 1-1:
PINOUT DESCRIPTION
Pin
Name
PDIP/
SOIC/
SSOP
QFN
Pin
Type
Function
GPB0
1
25
I/O
Bidirectional I/O pin. Can be enabled for interrupt-on-change and/or internal weak pull-up
resistor.
GPB1
2
26
I/O
Bidirectional I/O pin. Can be enabled for interrupt-on-change and/or internal weak pull-up
resistor.
GPB2
3
27
I/O
Bidirectional I/O pin. Can be enabled for interrupt-on-change and/or internal weak pull-up
resistor.
GPB3
4
28
I/O
Bidirectional I/O pin. Can be enabled for interrupt-on-change and/or internal weak pull-up
resistor.
GPB4
5
1
I/O
Bidirectional I/O pin. Can be enabled for interrupt-on-change and/or internal weak pull-up
resistor.
GPB5
6
2
I/O
Bidirectional I/O pin. Can be enabled for interrupt-on-change and/or internal weak pull-up
resistor.
GPB6
7
3
I/O
Bidirectional I/O pin. Can be enabled for interrupt-on-change and/or internal weak pull-up
resistor.
GPB7
8
4
I/O
Bidirectional I/O pin. Can be enabled for interrupt-on-change and/or internal weak pull-up
resistor.
VDD
95
P
Power
VSS
10
6
P
Ground
NC/CS
11
7
I
NC (MCP23017), Chip Select (MCP23S17)
SCL/SCK
12
8
I
Serial clock input
SDA/SI
13
9
I/O
Serial data I/O (MCP23017), Serial data input (MCP23S17)
NC/SO
14
10
O
NC (MCP23017), Serial data out (MCP23S17)
A0
15
11
I
Hardware address pin. Must be externally biased.
A1
16
12
I
Hardware address pin. Must be externally biased.
A2
17
13
I
Hardware address pin. Must be externally biased.
RESET
18
14
I
Hardware reset. Must be externally biased.
INTB
19
15
O
Interrupt output for PORTB. Can be configured as active-high, active-low or open-drain.
INTA
20
16
O
Interrupt output for PORTA. Can be configured as active-high, active-low or open-drain.
GPA0
21
17
I/O
Bidirectional I/O pin. Can be enabled for interrupt-on-change and/or internal weak pull-up
resistor.
GPA1
22
18
I/O
Bidirectional I/O pin. Can be enabled for interrupt-on-change and/or internal weak pull-up
resistor.
GPA2
23
19
I/O
Bidirectional I/O pin. Can be enabled for interrupt-on-change and/or internal weak pull-up
resistor.
GPA3
24
20
I/O
Bidirectional I/O pin. Can be enabled for interrupt-on-change and/or internal weak pull-up
resistor.
GPA4
25
21
I/O
Bidirectional I/O pin. Can be enabled for interrupt-on-change and/or internal weak pull-up
resistor.
GPA5
26
22
I/O
Bidirectional I/O pin. Can be enabled for interrupt-on-change and/or internal weak pull-up
resistor.
GPA6
27
23
I/O
Bidirectional I/O pin. Can be enabled for interrupt-on-change and/or internal weak pull-up
resistor.
GPA7
28
24
I/O
Bidirectional I/O pin. Can be enabled for interrupt-on-change and/or internal weak pull-up
resistor.



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