データシートサーチシステム
  Japanese  ▼
ALLDATASHEET.JP

X  

AFE0064 データシート(PDF) 4 Page - Texas Instruments

部品番号 AFE0064
部品情報  64 Channel Analog Front End for Digital X-Ray Detector
PDF  32 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
メーカー  TI2 [Texas Instruments]
ホームページ  https://www.ti.com
Logo TI2 - Texas Instruments

AFE0064 データシート(HTML) 4 Page - Texas Instruments

  AFE0064 Datasheet HTML 1Page - Texas Instruments AFE0064 Datasheet HTML 2Page - Texas Instruments AFE0064 Datasheet HTML 3Page - Texas Instruments AFE0064 Datasheet HTML 4Page - Texas Instruments AFE0064 Datasheet HTML 5Page - Texas Instruments AFE0064 Datasheet HTML 6Page - Texas Instruments AFE0064 Datasheet HTML 7Page - Texas Instruments AFE0064 Datasheet HTML 8Page - Texas Instruments AFE0064 Datasheet HTML 9Page - Texas Instruments Next Button
Zoom Inzoom in Zoom Outzoom out
 4 / 32 page
background image
AFE0064
SLAS672 – SEPTEMBER 2009 ........................................................................................................................................................................................ www.ti.com
SPECIFICATIONS (continued)
TA = 25 to 85°C, +VDD = 3.3 V, fCLK = 15 MHz for sequential mode and 3.75 MHz for simultaneous mode, scan time = 28.32
µs (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
ACCURACY
C-sensor(1)1= 30 pF, Range 3, 14 µSec
824
integration time
Noise in electrons referred to input of
C-sensor(1) = 20 pF, Range 3 14 µSec integration
600
e-
integrator
time
C-sensor(1)= 30 pF, Range 3, 270 µSec
1400
integration time
Integral nonlinearity
±0.006
% of
FSR(2)
Analog input channel leakage current
This current is integrated and reflects as a part of
2
pA
offset error.
Channel to channel full-scale error
For ranges 3 to 7
±0.7
% of
matching
FSR(2)
Offset error
Device output offset, resulting from integration of
±0.07
% of
input leakage current
FSR(2)
Channel to channel offset error
±0.07
% of
matching
FSR(2)
Integrator input offset:(difference
Integrator input offset mean across channels
±0.002
mV
between integrator positive and
negative terminal)
Integrator input offset matching across
±3 sigma limit of integrator input offset across
±1.5
mV
channels
channels
Channel to channel crosstalk
Aggressor channel with full scale charge to next
0.08
% of
adjacent channel
FSR(2)
EXTERNAL REFERENCE INPUT
REFP
2.24
2.25
+VDD -
V
0.85
REFM
0.84
0.85
0.86
V
Input current
50
nA
P_REF output
1.68
V
P_REF current source capacity
±1
mA
POWER SUPPLY REQUIREMENTS
Power supply voltage, +VDD
3.2
3.3
3.6
During operation
53
58
mA
Power supply current
During NAP
15
mA
Power up time from NAP
10
µSec
DIGITAL INPUT OUTPUT
Logic levels
VIH
0.8×VDD
VDD+0.1
VIL
–0.1
0.2×VDD
VOH
IOH = -500 µA
VDD–0.4
VOL
IOL = 500 µA
0.4
TEMPERATURE RANGE
Operating free air
0
85
°C
(1)
C-Sensor is total external capacitance seen at IN(x) pin. This includes capacitance of all the TFT switches connected to that node and
the routing capacitance.
(2)
FSR is full-scale range. There are eight ranges from 0.13 pC to 9.6 pC.
4
Submit Documentation Feedback
Copyright © 2009, Texas Instruments Incorporated
Product Folder Link(s) :AFE0064



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32


データシート ダウンロード

Go To PDF Page


リンク URL



ALLDATASHEETはお客様のビジネスに役立ちますか?  [ DONATE ] 

Alldatasheetは   |   広告   |   お問い合わせ   |   プライバシーポリシー   |   データシートへのリンク    |   リンク交換   |   メーカーリスト
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com