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データシートサーチシステム |
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ISO7421 データシート(PDF) 11 Page - Texas Instruments |
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ISO7421 データシート(HTML) 11 Page - Texas Instruments |
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11 / 30 page  ISO7420, ISO7420M, ISO7421 www.ti.com SLLS984I – JUNE 2009 – REVISED JULY 2015 Switching Characteristics: VCC1 at 5 V ±5%, VCC2 at 3.3 V ±5% (continued) TA = –40°C to 125°C for ISO7420M, TA = –40°C to 105°C for ISO742x PARAMETER TEST CONDITIONS MIN TYP MAX UNIT tf Output signal fall time 2 ns tfs Fail-safe output delay time from input power loss See Figure 7. 6 μs 6.12 Switching Characteristics: VCC1 at 3.3 V ±5%, VCC2 at 5 V ±5% TA = –40°C to 125°C for ISO7420M, TA = –40°C to 105°C for ISO742x PARAMETER TEST CONDITIONS MIN TYP MAX UNIT tPLH, tPHL Propagation delay time See Figure 6. 10 17 ns PWD(1) Pulse width distortion |tPHL – tPLH| 0.5 4 ns tsk(pp) Part-to-part skew time 8.5 ns tsk(o) Channel-to-channel output skew time 4 ns tr Output signal rise time See Figure 6. 2 ns tf Output signal fall time 2 ns tfs Fail-safe output delay time from input power loss See Figure 7. 6 μs (1) Also known as pulse skew. 6.13 Switching Characteristics: VCC1 and VCC2 at 3.3 V ±5% TA = –40°C to 125°C for ISO7420M, TA = –40°C to 105°C for ISO742x PARAMETER TEST CONDITIONS MIN TYP MAX UNIT tPLH, tPHL Propagation delay time 12 20 ns PWD(1) Pulse width distortion |tPHL – tPLH| See Figure 6. 1 5 ns tsk(pp) Part-to-part skew time 6.8 ns tsk(o) Channel-to-channel output skew time 5.5 ns tr Output signal rise time 2 ns See Figure 6. tf Output signal fall time 2 ns tfs Fail-safe output delay time from input power loss See Figure 7. 6 μs (1) Also known as pulse skew. Copyright © 2009–2015, Texas Instruments Incorporated Submit Documentation Feedback 11 Product Folder Links: ISO7420 ISO7420M ISO7421 |
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