L9908TR datasheet(144/152 Pages) STMICROELECTRONICS

144 / 152 page

Contents

Block diagram and pin description .................................................3

Absolute maximum ratings ........................................................7

2.1

Maximum Operating Range (MOR) ............................................... 7

2.1.1

Functional Operating Range ................................................ 7

2.1.2

Parametrical Operating Range .............................................. 9

2.2

Absolute Maximum Ratings (AMR) ............................................... 10

2.3

ESD resistivity ................................................................ 14

2.4

Temperature ranges and thermal data ............................................ 14

Current consumption .............................................................16

Functional safety .................................................................18

4.1

Safe states ................................................................... 18

4.1.1

SAFE-OFF ............................................................ 18

4.1.2

SAFE-DIS ............................................................. 18

4.1.3

SAFE-HIZ ............................................................. 18

4.2

Safe state activation ........................................................... 19

Functional description ............................................................21

5.1

Internal supply ................................................................ 21

5.1.1

VDD power supply ...................................................... 21

5.1.2

Internal supply monitor ................................................... 21

5.1.3

VDD monitor ........................................................... 22

5.2

Internal resets (INT_RST, CFG_RST) ............................................ 24

5.3

Device operation state machine ................................................. 26

5.4

Configuration mode............................................................ 28

5.4.1

Configuration mode activation.............................................. 29

5.5

Self-test mode ................................................................ 30

5.5.1

Self-test activation....................................................... 30

5.6

Fault Handling Management (FHM) .............................................. 32

5.6.1

FHC registers .......................................................... 33

5.6.2

Fault reaction scenarios .................................................. 35

5.6.3

Half bridges disable logic ................................................. 41

5.6.4

Gate driver supply enable logic ............................................. 41

5.7

Power-Up sequences .......................................................... 42

5.8

Digital I/O .................................................................... 43

5.8.1

VIO power supply ....................................................... 43

5.8.2

Digital Input (DI) ........................................................ 43

L9908

Contents

DS13546 - Rev 5

page 144/152

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