L9963E datasheet(12/184 Pages) STMICROELECTRONICS

12 / 184 page

Figure 5. Sketch of a 2s2p PCB with thermal vias

3.4

Power management

All parameters are tested and guaranteed in the following conditions, unless otherwise noted:

9.6 V < VBAT < 64 V; -40 °C < Tambient < 105 °C

Table 6. Power Management

Symbol

Parameter

Test conditions

Min. Typ. Max. Unit

IBAT_NORM, Total Supply Current

in Normal Mode from VBAT pin

Normal state (refer to Section 4.1 Device

functional state); no load on VTREF; the chip

performs continuously data transmission via isolated

communication interfaces to higher and lower sides

in a stack daisy chain.

Application info: IBAT is not affected by

communication. Current needed for COM interfaces

is drawn out of VREG regulator.

2.5

IBAT_NORM_ADC, Total Supply

Current in Normal Mode from

VBAT pin

Normal state; No load on VTREF; no

communication; The chip performs continuously

sampling and converting.

5.5

IREG_NORM_CSEN1, Total Supply

Current in Normal Mode from

VREG MOS

Normal state; No load on VTREF; no

communication; no ADC conversion; Curr sense.

Enabled by coulombcounter_en = 1

IREG_NORM_CSEN0, Total Supply

Current in Normal Mode from

VREG MOS

Normal state; No load on VTREF; no

communication; no ADC conversion; Curr sense

Disabled by coulombcounter_en = 0

IREG_NORM_ADC_CSEN1, Total

Supply Current in Normal Mode

from VREG MOS

Normal state; No load on VTREF; no

communication; The chip performs continuously

sampling and converting. Curr sense Enabled by

coulombcounter_en = 1

IREG_NORM_ADC_CSEN0, Total

Supply Current in Normal Mode

from VREG MOS

Normal state; No load on VTREF; no

communication; The chip performs continuously

sampling and converting. Curr sense Disabled by

coulombcounter_en = 0

IREG_NORM_COMM, Additional

supply current drawn from VREG

for communication

Normal state; No load on VTREF; The chip

performs continuously data transmission via

isolated communication interfaces to higher and

lower sides in a stack daisy chain. (measured

with out_res_tx_isoh/l = 11, highest differential

amplitude, highest consumption).

10.8

IBAT_SLP, Supply Current in Sleep

Mode

Lowest power state; Both internal oscillator and

external wakeup detection on.

µA

IBAT_SLP_BAL_CONF

Supply Current in Silent Balance Mode (enabled

only regulators necessary to bias balance

preregulators, refer to Section 4.1 Device

functional state).

1.2

2.8

IBAT_BALANCE

Delta current when the balancing of all 14 cells are

activated.

0.4 0.55

0.7

L9963E

Power management

DS13636 - Rev 12

page 12/184

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