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データシートサーチシステム |
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STPM098C データシート(PDF) 62 Page - STMicroelectronics |
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STPM098C データシート(HTML) 62 Page - STMicroelectronics |
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62 / 110 page  Figure 50. Output undercurrent monitor timing - Diagram 3 I t IPHASEn 0A PEAK AVERAGE IOUTn_UC_TH TH crossing and detection on peak current TH crossing and detection on average current Current margin on diagnosis triggering Single phase overcurrent diagnosis A dedicated OC monitoring on single phase current is performed by means of a dedicated analog comparator set. Figure 51. Single phase overcurrent simplified block diagram DIGITAL ISENn CFILT/ISEN Gm IOUTn_OC_POS_FAST Up/Reset + - IOUTn_OC_POS _FAST_RETRY GND VCC GND VCC IOUTn_OC_POS _SLOW Up/Reset IOUTn_OC_POS _SLOW_RETRY IOUTn_OC_NEG _SLOW Up/Reset IOUTn_OC_NEG _SLOW_RETRY FF FF CLK CLK CLK 1 0 CLK FLT + - VCC GND GND If ISENn-CFILT/VREF1 ≥ IOUTm_oc_pos_slow_th occurs IOUTm_oc_pos_slow_retry times consecutively, the IOUTn_OC_POS_SLOW flag is set. Fault pins and safe state activation depend on FHC configuration. IOUTn_OC_POS_SLOW clearing depends on FHC configuration [n = 1, 2, 3, 4, 5, 6, 7, 8] and [m = 1, 2]. STPM098C Functional description DS14440 - Rev 1 page 62/110 |
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