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STM32L433CB データシート(PDF) 32 Page - STMicroelectronics

部品番号 STM32L433CB
部品情報  Ultra-low-power Arm® Cortex®-M4 32-bit MCUFPU, 100DMIPS, up to 256KB flash, 64KB SRAM, USB FS, LCD, ext. SMPS
PDF  227 Pages
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メーカー  STMICROELECTRONICS [STMicroelectronics]
ホームページ  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STM32L433CB データシート(HTML) 32 Page - STMicroelectronics

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Functional overview
STM32L433xx
32/227
DS11449 Rev 7
3.10
Interconnect matrix
Several peripherals have direct connections between them. This allows autonomous
communication between peripherals, saving CPU resources thus power supply
consumption. In addition, these hardware connections allow fast and predictable latency.
Depending on peripherals, these interconnections can operate in Run, Sleep, low-power run
and sleep, Stop 0, Stop 1 and Stop 2 modes.
Table 6. STM32L433xx peripherals interconnect matrix
Interconnect source
Interconnect
destination
Interconnect action
TIMx
TIMx
Timers synchronization or chaining
Y
Y
Y
Y
-
-
ADCx
DAC1
Conversion triggers
Y
Y
Y
Y
-
-
DMA
Memory to memory transfer trigger
Y
Y
Y
Y
-
-
COMPx
Comparator output blanking
Y
Y
Y
Y
-
-
TIM15/TIM16
IRTIM
Infrared interface output generation
Y
Y
Y
Y
-
-
COMPx
TIM1
TIM2
Timer input channel, trigger, break from
analog signals comparison
YY
YY
-
-
LPTIMERx
Low-power timer triggered by analog
signals comparison
YY
YY
Y
Y
(1)
ADCx
TIM1
Timer triggered by analog watchdog
Y
Y
Y
Y
-
-
RTC
TIM16
Timer input channel from RTC events
Y
Y
Y
Y
-
-
LPTIMERx
Low-power timer triggered by RTC alarms
or tampers
YY
YY
Y
Y
(1)
All clocks sources (internal
and external)
TIM2
TIM15, 16
Clock source used as input channel for
RC measurement and trimming
YY
YY
-
-
USB
TIM2
Timer triggered by USB SOF
Y
Y
-
-
-
-
CSS
CPU (hard fault)
RAM (parity error)
Flash memory (ECC error)
COMPx
PVD
TIM1
TIM15,16
Timer break
Y
Y
Y
Y
-
-



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