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R5F10CMDCLFB データシート(PDF) 79 Page - Renesas Technology Corp

部品番号 R5F10CMDCLFB
部品情報  RENESAS MCU
PDF  139 Pages
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メーカー  RENESAS [Renesas Technology Corp]
ホームページ  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

R5F10CMDCLFB データシート(HTML) 79 Page - Renesas Technology Corp

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RL78/D1A
3. ELECTRICAL SPECIFICATIONS (J GRADE PRODUCT)
R01DS0463EJ0120 Rev. 1.20
Page 79 of 135
Mar 31, 2026
3.5.7 Serial interface: LIN-UART (UARTF) operation
TA = -40 to +85
°C
2.7 V
≤ EVDD0 = EVDD1 ≤ VDD ≤ 5.5 V, VSS = EVSS0 = EVSS1 = 0 V
Item
Symbols
Conditions
Min.
Max.
Unit
Transfer rate
T
1.0
Mbps
Caution Different voltage between EVDD and VDD is allowed only when LCDM register is initial value.
3.5.8 Serial interface: CAN operation
TA = -40 to +85
°C,
2.7 V
≤ EVDD0 = EVDD1 ≤ VDD ≤ 5.5 V, VSS = EVSS0 = EVSS1 = 0 V
Items
Symbols
Conditions
Min.
Max.
Unit
Transfer rate
T
1.0
Mbps
Internal delay time
tNODE
100
ns
CRxD minimum pulse width
for wake up
tCRXW
Necessary
width to detect
wakeup signal
200
ns
Caution Different voltage between EVDD and VDD is allowed only when LCDM register is initial value.
Figure 3-13. Internal delay time of CAN
CAN Internal clock Note
CTxD pin
(Transfer data)
CRxD pin
(Receive data)
tOUTPUT
tINPUT
Internal delay time (tNODE) = Internal Transfer Delay (toutput) + Internal Receive Delay (tInput)
Note CAN Internal clock (fCAN): CAN baud rate clock
CAN
macro
RL78/D1A
Internal Transfer Delay
Internal Receive Delay
CTxD pin
CRxD pin
Image figure of Internal delay



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