AT45DB021E datasheet(14/69 Pages) RENESAS

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DS-AT45DB021E-8789 Rev. N

Page 14

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AT45DB021E Datasheet

which page of the main memory array to read and the last nine bits (BA8 - BA0) of the 19-bit address sequence

specify the starting byte address within the page. To perform a Continuous Array Read using the binary page size

(256 bytes), the opcode 01h must be clocked into the device followed by three address bytes (A17 - A0).

Following the address bytes, additional clock pulses on the SCK pin result in data being output on the SO pin.

The CS pin must remain low during the loading of the opcode, the address bytes, and the reading of data. When

the end of a page in the main memory is reached during a Continuous Array Read, the device continues reading

at the beginning of the next page with no delays incurred during the page boundary crossover (the crossover from

the end of one page to the beginning of the next page). When the last bit in the main memory array has been read,

the device continues reading back at the beginning of the first page of memory. As with crossing over page

boundaries, no delays are incurred when wrapping around from the end of the array to the beginning of the array.

A low-to-high transition on the CS pin terminates the read operation and tri-state the output pin (SO). The

maximum SCK frequency allowable for the Continuous Array Read is defined by the fCAR3 specification. The

Continuous Array Read bypasses the data buffer and leaves the contents of the Buffer unchanged.

7.3

Main Memory Page Read

A Main Memory Page Read allows the user to read data directly from any one of the 1,024 pages in the main

memory, bypassing the data buffer and leaving the contents of the Buffer unchanged. To start a Main Memory

Page Read using the standard DataFlash page size (264 bytes), the CS pin must first be asserted then an opcode

of D2h must be clocked into the device followed by three address bytes (which comprise the 24-bit page and byte

address sequence) and four dummy bytes. The first 10 bits (PA9 - PA0) of the 19-bit address sequence specify

which page of the main memory array to read, and the last nine bits (BA8 - BA0) of the 19-bit address sequence

specify the starting byte address within the page. To perform a Main Memory Page Read with the binary page size

(256 bytes), the opcode D2h must be clocked into the device followed by three address bytes (A17 - A0) and four

dummy bytes. The first 10 bits (A17 - A8) of the 18-bit address sequence specify which page of the main memory

array to read, and the last eight bits (A7 - A0) of the 18-bit address sequence specify the starting byte address

within that page. The dummy bytes that follow the address bytes are sent to initialize the read operation. Following

the dummy bytes, the additional pulses on SCK result in data being output on the SO (Serial Output) pin.

The CS pin must remain low during the loading of the opcode, the address bytes, the dummy bytes, and the

reading of data. Unlike the Continuous Array Read command, when the end of a page in main memory is reached,

the device continues reading back at the beginning of the same page rather than the beginning of the next page.

A low-to-high transition on the CS pin terminates the read operation and tri-state the output pin (SO). The

maximum SCK frequency allowable for the Main Memory Page Read is defined by the fSCK specification. The

Main Memory Page Read bypasses the data buffer and leaves the contents of the Buffer unchanged.

7.4

Buffer Read

The data buffer can be accessed independently from the main memory array, and using the Buffer Read

command allows data to be sequentially read directly from the Buffer. Two opcodes, D4h or D1h, can be used for

the Buffer Read command. The use of each opcode depends on the maximum SCK frequency that is used to read

data from the Buffer. The D4h opcode can be used at any SCK frequency up to the maximum specified by fCAR

while the D1h opcode can be used for lower frequency read operations up to the maximum specified by fCAR2.

To perform a Buffer Read using the standard DataFlash buffer size (264 bytes), the opcode must be clocked into

the device followed by three address bytes comprised of 15 dummy bits and nine buffer address bits (BFA8 -

BFA0). To perform a Buffer Read using the binary buffer size (256 bytes), the opcode must be clocked into the

device followed by three address bytes comprised of 16 dummy bits and eight address bits (A7 - A0). Following

the address bytes, one dummy byte must be clocked into the device to initialize the read operation if using opcode

D4h. The CS must remain low during the loading of the opcode, the address bytes, the dummy byte (for opcode

D4h only), and the reading of data. When the end of a buffer is reached, the device continues reading back at the

beginning of the Buffer. A low-to-high transition on the CS pin terminates the read operation and tri-state the

output pin (SO).

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