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9DB433AFILF データシート(PDF) 11 Page - Renesas Technology Corp |
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9DB433AFILF データシート(HTML) 11 Page - Renesas Technology Corp |
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11 / 18 page ![]() 9DB433 FOUR OUTPUT DIFFERENTIAL BUFFER FOR PCIE GEN1–3 IDT® FOUR OUTPUT DIFFERENTIAL BUFFER FOR PCIE GEN1–3 11 9DB433 MAY 25, 2018 SMBus Table: Frequency Select Register, READ/WRITE ADDRESS (Selectable) Pin # Name Control Function Type0 1 Default Bit 7 PD_Mode PD# drive mode RW driven Hi-Z 1 Bit 6 OE_Mode OE#_Stop drive mode RW driven Hi-Z 0 Bit 5 0 Bit 4 X Bit 3 MODE1 BYPASS#/PLL1 RW Latched Bit 2 1 Bit 1 MODE0 BYPASS#/PLL0 RW Latched Bit 0 SRC_DIV# SRC Divide by 2 Select RW x/2 x/1 1 SMBus Table: Output Control Register Pin # Name Control Function Type0 1 Default Bit 7 1 Bit 6 DIF_6 Output Enable RW Disable Enable 1 Bit 5 DIF_5 Output Enable RW Disable Enable 1 Bit 4 1 Bit 3 1 Bit 2 DIF_2 Output Enable RW Disable Enable 1 Bit 1 DIF_1 Output Enable RW Disable Enable 1 Bit 0 1 NOTE: The SMBus Output Enable Bit must be '1' AND the respective OE pin must be active for the output to run! SMBus Table: OE Pin Control Register Pin # Name Control Function Type0 1 Default Bit 7 0 Bit 6 DIF_6 DIF_6 Stoppable with OE6# RW Free-run Stoppable 0 Bit 5 DIF_5 DIF_5 Stoppable with OE5# RW Free-run Stoppable 0 Bit 4 0 Bit 3 0 Bit 2 DIF_2 DIF_2 Stoppable with OE2# RW Free-run Stoppable 0 Bit 1 DIF_1 DIF_1 Stoppable with OE1# RW Free-run Stoppable 0 Bit 0 0 SMBus Table: Reserved Register Pin # Name Control Function Type0 1 Default Bit 7 X Bit 6 X Bit 5 X Bit 4 X Bit 3 X Bit 2 X Bit 1 X Bit 0 X Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved 6,7 Reserved Byte 3 Reserved Reserved Reserved NOTE: Only OE1# and OE6# are available on 28-TSSOP/SSOP packages. If you wish the default to be "Stoppable" see the 9DB434. 19,20 9,10 Reserved 6,7 22,23 Byte 1 9,10 Byte 2 Byte 0 - - - - - Reserved 22,23 19,20 - - - See Operating Mode Readback Table See Operating Mode Readback Table Reserved Reserved |
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