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PSD4235G2 データシート(PDF) 82 Page - STMicroelectronics

部品番号 PSD4235G2
部品情報  Flash In-System Programmable ISP Peripherals For 16-bit MCUs 5V Supply
PDF  89 Pages
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メーカー  STMICROELECTRONICS [STMicroelectronics]
ホームページ  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

PSD4235G2 データシート(HTML) 82 Page - STMicroelectronics

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Table 69. Reset (Reset)Timing
Note: 1. Reset (RESET) does not reset Flash memory Program or Erase cycles.
2. Warm reset aborts Flash memory Program or Erase cycles, and puts the device in Read mode.
Figure 48. Reset (RESET) Timing
Table 70. VSTBYON Timing
Note: 1. VSTBYON timing is measured at VCC ramp rate of 2 ms.
Table 71. Program, Write and Erase Times
Note: 1. Programmed to all zero before erase.
2. The polling status, DQ7, is valid tQ7VQV time units before the data byte, DQ0-DQ7, is valid for reading.
3. DQ7 is DQ15 for Motorola MCU with 16-bit data bus.
Symbol
Parameter
Conditions
Min
Max
Unit
tNLNH
RESET Active Low Time 1
150
ns
tNLNH–PO
Power On Reset Active Low Time
1
ms
tNLNH–A
Warm Reset 2
25
µs
tOPR
RESET High to Operational Device
120
ns
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
tBVBH
VSTBY Detection to VSTBYON Output High
(Note 1)
20
µs
tBXBL
VSTBY Off Detection to VSTBYON Output
Low
(Note 1)
20
µs
Symbol
Parameter
Min.
Typ.
Max.
Unit
Flash Program
8.5
s
Flash Bulk Erase1 (pre-programmed)
330
s
Flash Bulk Erase (not pre-programmed)
10
s
tWHQV3
Sector Erase (pre-programmed)
1
30
s
tWHQV2
Sector Erase (not pre-programmed)
2.2
s
tWHQV1
Byte Program
14
1200
µs
Program / Erase Cycles (per Sector)
100,000
cycles
tWHWLO
Sector Erase Time-Out
100
µs
tQ7VQV
DQ7 Valid to Output (DQ7-DQ0) Valid (Data Polling)2
30
ns
tNLNH-PO
tOPR
AI02866b
RESET
tNLNH
tNLNH-A
tOPR
VCC
V
CC(min)
Power-On Reset
Warm Reset



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