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NRF24L01P-R7 データシート(PDF) 65 Page - Nordic Semiconductor

部品番号 NRF24L01P-R7
部品情報  Single Chip 2.4GHz Transceiver
PDF  78 Pages
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メーカー  NORDIC [Nordic Semiconductor]
ホームページ  https://www.nordicsemi.com/
Logo NORDIC - Nordic Semiconductor

NRF24L01P-R7 データシート(HTML) 65 Page - Nordic Semiconductor

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Revision 1.0
Page 65 of 78
nRF24L01+ Product Specification
Figure 31. Principle of crystal oscillator
The nRF24L01+ crystal oscillator is amplitude regulated. It is recommended to use an input signal larger
than 0.4V-peak to achieve low current consumption and good signal-to-noise ratio when using an external
clock. XC2 is not used and can be left as an open pin when clocked externally.
10.4
PCB layout and decoupling guidelines
A well designed PCB is necessary to achieve good RF performance. A poor layout can lead to loss of per-
formance or functionality. You can download a fully qualified RF layout for the nRF24L01+ and its sur-
rounding components, including matching networks, from www.nordicsemi.no.
A PCB with a minimum of two layers including a ground plane is recommended for optimum performance.
The nRF24L01+ DC supply voltage should be decoupled as close as possible to the VDD pins with high
performance RF capacitors, see Table 29. on page 67. Mounting a large surface mount capacitor (for
example, 4.7µF ceramic) in parallel with the smaller value capacitors is recommended. The nRF24L01+
supply voltage should be filtered and routed separately from the supply voltages of any digital circuitry.
Avoid long power supply lines on the PCB. All device grounds, VDD connections and VDD bypass capaci-
tors must be connected as close as possible to the nRF24L01+ IC. The VSS pins should be connected
directly to the ground plane for a PCB with a topside RF ground plane. We recommend having via holes as
close as possible to the VSS pads for a PCB with a bottom ground plane. A minimum of one via hole
should be used for each VSS pin.
Full swing digital data or control signals should not be routed close to the crystal or the power supply lines.
The exposed die attach pad is a ground pad connected to the IC substrate die ground and is intentionally
not used in our layouts. We recommend to keep it unconnected.
XC1
XO_OUT
Amplitude
controlled
current source
Buffer:
Sine to
full swing
Current starved
inverter:
XOSC core
XC2
Vdd
Vss
Vdd
Vss
ESD
ESD
Rbias



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