ST62T28C datasheet(12/84 Pages) STMICROELECTRONICS

12 / 84 page

12/84

ST62T28C/E28C

1.4 PROGRAMMING MODES

1.4.1 Option Bytes

The two Option Bytes allow configuration capabili-

ty to the MCUs. Option byte’s content is automati-

cally read, and the selected options enabled, when

the chip reset is activated.

It can only be accessed during the programming

mode. This access is made either automatically

(copy from a master device) or by selecting the

OPTION BYTE PROGRAMMING mode of the pro-

grammer.

The option bytes are located in a non-user map.

No address has to be specified.

EPROM Code Option Byte (LSB)

EPROM Code Option Byte (MSB)

D15-D13. Reserved. Must be cleared.

ADC SYNCHRO. When set, an A/D conversion is

started upon WAIT instruction execution, in order

to reduce supply noise. When this bit is low, an A/

D conversion is started as soon as the STA bit of

the A/D Converter Control Register is set.

D11.

UART Frame. When set, UART transmission

and reception are based on a 11-bit frame. When

cleared, a 10-bit frame is used.

D10. Reserved

EXTCNTL.

External STOP MODE control.. When

EXTCNTL is high, STOP mode is available with

watchdog active by setting NMI pin to one. When

EXTCNTL is low, STOP mode is not available with

the watchdog active.

LVD.

LVD RESET enable.When this bit is set, safe

RESET is performed by MCU when the supply

voltage is too low. When this bit is cleared, only

power-on reset or external RESET are active.

PROTECT.

Readout Protection. This bit allows the

protection of the software contents against piracy.

When the bit PROTECT is set high, readout of the

OTP contents is prevented by hardware.. When

this bit is low, the user program can be read.

OSCIL.

Oscillator selection. When this bit is low,

the oscillator must be controlled by a quartz crys-

tal, a ceramic resonator or an external frequency.

When it is high, the oscillator must be controlled by

an RC network, with only the resistor having to be

externally provided.

D5.

Port Pull. This bit must be set high to disable

pull-up at reset on the I/O port. When this bit is

low,I/O ports are in input with pull-up.

D4. Reserved. Must be cleared to zero.

NMI PULL.

NMI Pull-Up. This bit must be set high

to configure the NMI pin with a pull-up resistor.

When it is low, no pull-up is provided.

TIM PULL.

TIM Pull-Up. This bit must be set high

to configure the TIMER pin with a pull-up resistor.

When it is low, no pull-up is provided.

WDACT. This bit controls the watchdog activation.

When it is high, hardware activation is selected.

The software activation is selected when WDACT

is low.

OSGEN.

Oscillator Safe Guard. This bit must be

set high to enable the Oscillator Safe Guard.

When this bit is low, the OSG is disabled.

The Option byte is written during programming ei-

ther by using the PC menu (PC driven Mode) or

automatically (stand-alone mode).

PRO-

TECT

OSCIL

PORT

PULL

NMI

PULL

TIM

PULL

WDACT

OS-

GEN

---

ADC

SYNCHRO

UART

FRAME

EXTC-

NTL

LVD

ST62T28C データシート(PDF) 12 Page - STMicroelectronics

ST62T28C データシート(HTML) 12 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84

データシートダウンロード

リンク URL

ST62T28C データシート(PDF) 12 Page - STMicroelectronics

ST62T28C データシート(HTML) 12 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84

データシート ダウンロード

リンク URL

データシートダウンロード