ST63142 datasheet(82/86 Pages) STMICROELECTRONICS

82 / 86 page

Symbol

Parameter

Test Conditions

Value

Unit

Min.

Typ.

Max.

tWRES

Minimum Pulse Width

RESET Pin

125

tOHL

High to Low Transition Time

PA6, PA7

VDD = 5V, CL = 1000pF (2)

100

tOHL

High to Low Transition Time

DA0-DA5, PB0-PB6, OSD

Outputs, PC0-PC7,

VDD = 5V, CL = 100pF

tOLH

Low to High Transition Time

PB0-PB6, PA0-PA3, OSD

Outputs, PC0-PC3

VDD = 5V, CL = 100pF

tOH

Data HOLD Time

SPI after clock goes low

2CBUS/S-BUS Only

175

f DA

D/A Converter Repetition

Frequency

(1)

31.25

kHz

f SIO

SIO Baud Rate

(1)

62.50

kHz

tWEE

EEPROM Write Time

TA =25

°C One Byte

Endurance

EEPROM WRITE/ERASE Cycles

QA LOT

Acceptance Criteria

300.000

million

cycles

Retention

EEPROM Data Retention (4)

TA =25

°C

years

CIN

Input Capacitance (3)

All Inputs Pins

COUT

Output Capacitance (3)

All outputs Pins

COSCin,

COSCout

Oscillator Pins Internal

Capacitance(3)

5pF

COSDin,

COSDout

OSD Oscillator External

Capacitance

Recommended

Notes:

1.A clock other than 8 MHz will affect the frequency response of those peripherals (D/A, 62.5kHz and SPI) whose clock is

derived from the system clock.

2. The rise and fall times of PORT A have been reduced in order to avoid current spikes while maintaining a high drive capability

3. Not 100% Tested

4. Based on extrapolated data

AC ELECTRICAL CHARACTERISTICS

(TA = 0 to +70

°C, fOSC=8MHz, VDD=4.5 to 6.0V unless otherwise specified )

ST63E140,E142,E126,E156, T140,T142,T126,T156

78/82

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