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ST72311R データシート(PDF) 18 Page - STMicroelectronics |
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ST72311R データシート(HTML) 18 Page - STMicroelectronics |
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18 / 164 page  ST72311R, ST72511R, ST72512R, ST72532R 18/164 DATA EEPROM (Cont’d) 3.4 POWER SAVING MODES Wait mode The DATA EEPROM can enter WAIT mode on ex- ecution of the WFI instruction of the microcontrol- ler. The DATA EEPROM will immediately enter this mode if there is no programming in progress, otherwise the DATA EEPROM will finish the cycle and then enter WAIT mode. Halt mode The DATA EEPROM immediatly enters HALT mode if the microcontroller executes the HALT in- struction. Therefore the EEPROM will stop the function in progress, and data may be corrupted. 3.5 ACCESS ERROR HANDLING If a read access occurs while LAT=1, then the data bus will not be driven. If a write access occurs while LAT=0, then the data on the bus will not be latched. If a programming cycle is interrupted (by software/ RESET action), the memory data will not be guar- anteed. Figure 6. Data EEPROM Programming Cycle LAT ERASE CYCLE WRITE CYCLE PGM tPROG READ OPERATION NOT POSSIBLE WRITE OF DATA LATCHES READ OPERATION POSSIBLE INTERNAL PROGRAMMING VOLTAGE EEPROM INTERRUPT |
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