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ST72E121 データシート(PDF) 26 Page - STMicroelectronics

部品番号 ST72E121
部品情報  8-BIT MCU WITH 8 TO 16K OTP/EPROM, 384 TO 512 BYTES RAM, WDG, SCI, SPI AND 2 TIMERS
PDF  92 Pages
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メーカー  STMICROELECTRONICS [STMicroelectronics]
ホームページ  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

ST72E121 データシート(HTML) 26 Page - STMicroelectronics

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ST72E121 ST72T121
I/O PORTS (Cont’d)
Figure 19
. I/O Block Diagram
Table 9. Port Mode Configuration
Legend:
0 -
present, not activated
1 -
present and activated
Notes:
– No OR Register on some ports (see register map).
– ADC Switch on ports with analog alternate functions.
DR
DDR
LATCH
LATCH
DR SEL
DDR SEL
VDD
PAD
ANALOG
SWITCH
ANALOG ENABLE
(ADC)
M
U
X
ALTERNATE
ALTERNATE
ALTERNATE ENABLE
ALTERNATE
M
U
X
ALTERNATE INPUT
PULL-UP
OUTPUT
P-BUFFER
(SEE TABLE BELOW)
N-BUFFER
1
0
1
0
OR
LATCH
OR SEL
FROM
OTHER
BITS
EXTERNAL
PULL-UP
CONDITIO N
ENABLE
ENABLE
GND
(SEE TABLE BELOW)
(SEE NOTE BELOW)
CMOS
SCHMITT TRIGGER
SOURCE (EIx)
INTERRUPT
POLARITY
SEL
GND
VDD
DIODE
(SEE TABLE BELOW)
Configuratio n Mode
Pull-up
P-buffer
VDD Diode
Floating
0
0
1
Pull-up
1
0
1
Push-pull
0
1
1
True Open Drain
not present
not present
not present
Open Drain (logic level)
0
0
1
26



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