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ST92F120JR9T データシート(PDF) 305 Page - STMicroelectronics

部品番号 ST92F120JR9T
部品情報  8/16-BIT FLASH MCU FAMILY WITH RAM, EEPROM AND J1850 BLPD
PDF  320 Pages
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メーカー  STMICROELECTRONICS [STMicroelectronics]
ホームページ  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

ST92F120JR9T データシート(HTML) 305 Page - STMicroelectronics

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ST92F120 - ELECTRICAL CHARACTERISTICS
EXTENDED FUNCTION TIMER EXTERNAL TIMING TABLE
(VDD =5V ± 10%, TA = 40°C to +105°C, CLoad = 50pF, fINTCLK = 24MHz, unless otherwise specified)
Note: The value in the left hand column shows the formula used to calculate the timing minimum or maximum from the oscillator clock period,
standard timer prescaler and counter programmed values.
The value in the right hand two columns show the timing minimum and maximum for an internal clock (INTCLK) at 24MHz, and minimum
prescaler factor (=2).
Measurement points are VIH for positive pulses and VIL for negative pulses.
(1) Formula guaranteed by design.
Legend:
Tck = INTCLK period = OSCIN period when OSCIN is not divided by 2;
2 x OSCIN period when OSCIN is divided by 2;
OSCIN period x PLL factor when the PLL is enabled.
Prsc = Precsaler factor defined by Extended Function Timer Clock Control bits (CC1,CC0) on control register CR2 (values: 2,4,8).
EXTENDED FUNCTION TIMER EXTERNAL TIMING
N
°
Symbol
Parameter
Value
Unit
Formula (1)
Min
1TwPEWL
External Clock low pulse width (EXTCLK)
-
2 x Tck + 10
ns
2TwPEWH
External Clock high pulse width (EXTCLK)
-
2 x Tck + 10
ns
3TwPIWL
Input Capture low pulse width (ICAPx)
-
2 x Tck + 10
ns
4TwPIWH
Input Capture high pulse width (ICAPx)
-
2 x Tck + 10
ns
5TwECKD
Distance between two active edges on EXTCLK
≥ 4 x Tck + 10
177
ns
6TwEICD
Distance between two active edges on ICAPx
2 x Tck x Prsc +10
177
ns
12
5
EXTCLK
34
6
ICAPA
ICAPB
1



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