| データシートサーチシステム |
|
ST92F120JR9T データシート(PDF) 307 Page - STMicroelectronics |
|
|
|||||||||||||||||||||||||||||
ST92F120JR9T データシート(HTML) 307 Page - STMicroelectronics |
|
307 / 320 page ![]() 307/320 ST92F120 - ELECTRICAL CHARACTERISTICS SCI TIMING TABLE (VDD =5V ± 10%, TA = –40°C to +105°C, CLoad = 50pF, fINTCLK = 24MHz, unless otherwise specified) Legend: Tck = INTCLK period = OSCIN period when OSCIN is not divided by 2; 2 x OSCIN period when OSCIN is divided by 2; OSCIN period x PLL factor when the PLL is enabled. SCI TIMING N ° Symbol Parameter Conditio n Value Unit Min Max FRxCKIN Frequency of RxCKIN 1x mode fINTCLK /8 MHz 16x mode fINTCLK /4 MHz TwRxCKIN RxCKIN shortest pulse 1x mode 4 x Tck s 16x mode 2 x Tck s FTxCKIN Frequency of TxCKIN 1x mode fINTCLK /8 MHz 16x mode fINTCLK /4 MHz TwTxCKIN TxCKIN shortest pulse 1x mode 4 x Tck s 16x mode 2 x Tck s 1TsDS DS (Data Stable) before rising edge of RxCKIN 1x mode reception with RxCKIN Tck / 2 ns 2TdD1 TxCKIN to Data out delay Time 1x mode transmission with external clock CLoad < 50pF 2.5 x Tck ns 3TdD2 CLKOUT to Data out delay Time 1x mode transmission with CLKOUT 350 ns 1 |
|
リンク URL |
| ALLDATASHEETはお客様のビジネスに役立ちますか? [ DONATE ] |
Alldatasheetは | 広告 | お問い合わせ | プライバシーポリシー | データシートへのリンク | リンク交換 | メーカーリスト All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |