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STA323W データシート(PDF) 35 Page - STMicroelectronics |
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STA323W データシート(HTML) 35 Page - STMicroelectronics |
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35 / 77 page ![]() STA323W I2C bus specification 35/77 Current address multi-byte read The multi-byte read modes can start from any internal address. Sequential data bytes are read from sequential addresses within the STA323W. The master acknowledges each data byte read and then generates a STOP condition to terminate the transfer. Random address byte read Following the START condition the master sends a device select code with the RW bit set to 0. The STA323W acknowledges this and then the master writes the internal address byte. After receiving, the internal byte address the STA323W again responds with an acknowledgement. The master then initiates another START condition and sends the device select code with the RW bit set to 1. The STA323W acknowledges this and then responds by sending one byte of data. The master then terminates the transfer by generating a STOP condition. Random address multi-byte read The multi-byte read modes can start from any internal address. Sequential data bytes are then read from sequential addresses within the STA323W. The master acknowledges each data byte read and then generates a STOP condition to terminate the transfer. |
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