STV0299B datasheet(20/36 Pages) STMICROELECTRONICS

20 / 36 page

STV0299B

5REGISTER LIST (continued)

20/36

AUXILIARY CLOCK REGISTER (refer to

Section 4.1.8 on page 8)

ACR

[7:0]

ACR Prescaler and Divider

This register is made up of the ACR [7:5] Prescaler field and the ACR

[4:0] Divider field. The values in these fields configure the auxiliary

clock function, the prescalar value, the clock signal frequency.

The frequency range is given for fVCO =400 MHz.

ACR [7:0]

Function

Prescaler

Signal Frequency

Range

000XXXX0

Output

Port

N/A

output port = 0

N/A

000XXXX1

Output

Port

N/A

output port = 1

N/A

001XXXXX

generator

fVCO/8/ACR[4:0]

1.6 to

50 MHz

010XXXXX

generator

fVCO/8192/(32+ACR[4:0])

775 to

1525 Hz

011XXXXX

generator

128

fVCO/16384/(32+ACR[4:0])

388 to

762 Hz

100XXXXX

generator

256

fVCO/32768/(32+ACR[4:0])

194 to

381 Hz

101XXXXX

generator

512

fVCO/65536/(32+ACR[4:0])

97 to

190 Hz

110XXXXX

generator

1024

fVCO/131072/(32+ACR[4:0])

49 to

95 Hz

111XXXXX

generator

2048

fVCO/262144/(32+ACR[4:0])

24 to

47 Hz

the

generator,

the

programmable

division

factor

32 + ACR[4:0]. In the HF generator, it is simply ACR[4:0]. This allows

the building of any frequency from 24 Hz to 1.1 kHz (within ±1.5%) in

the full operating range. The output signal is square in all cases.

When the auxiliary register is written, the prescaler and the program-

mable divider are reset.

F22 FREQUENCY REGISTER (refer to

Section 4.1.8 on page 8)

F22FR

[7:0]

The actual frequency is fVCO/(128 R[7:0]). When this register is

accessed, the divider by 16 (also common to AUX_CLK) and the

divider by R[7:0] are initialized.

I2CRPT REGISTER (refer To

Section 4.1.10 on page 10)

I2CRPT

I2CT

1: I2C repeater

0: Output port

[6]

Must be programmed to zero.

[5:4]

Repeater response time; value does not matter if the external time

constant

≤ 250ns.

[3]

Must be programmed to zero.

SCLT Port value

This bit must be programmed to zero.

SDAT Port value

Name

HEX

Address

Reset

Value

Bit

Position

Signal Description

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