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H8SX1663 データシート(PDF) 683 Page - Renesas Technology Corp

部品番号 H8SX1663
部品情報  Renesas 32-Bit CISC Microcomputer H8SX Family / H8SX/1600 Series
PDF  1158 Pages
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メーカー  RENESAS [Renesas Technology Corp]
ホームページ  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

H8SX1663 データシート(HTML) 683 Page - Renesas Technology Corp

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Section 12 8-Bit Timers (TMR)
Rev.1.00 Jun. 07, 2006 Page 631 of 1102
REJ09B0294-0100
12.8
Usage Notes
12.8.1
Notes on Setting Cycle
If the compare match is selected for counter clear, TCNT is cleared at the last state in the cycle in
which the values of TCNT and TCOR match. TCNT updates the counter value at this last state.
Therefore, the counter frequency is obtained by the following formula.
f =
φ / (N + 1 )
f:
Counter frequency
φ: Operating frequency
N: TCOR value
12.8.2
Conflict between TCNT Write and Counter Clear
If a counter clear signal is generated during the T
2 state of a TCNT write cycle, the clear takes
priority and the write is not performed as shown in figure 12.15.
P
φ
Address
TCNT address
Internal write signal
Counter clear signal
TCNT
N
H'00
T
1
T
2
TCNT write cycle by CPU
Figure 12.15 Conflict between TCNT Write and Clear



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