LT6554

10

6554fa

TYPICAL APPLICATIO

RGB Buffer Demo Board

The DC794 Demo Board illustrates optimal routing,

bypassing and termination using the LT6554 as an

RGB video buffer. The schematic is shown in Figure 4. All

inputs and outputs are routed to have a characteristic

impedance of 75Ω. The 75Ω input shunt and output series

terminations are connected as close to the part as pos-

sible. While the 75Ω back termination resistors at the

outputs of the LT6554 minimize signal reflections in the

output traces and isolate the part from any capacitive

loading in those traces, they also contribute to gain error

if the output is not terminated with high impedance. For

example, if the output is terminated with a 1k load, the 75Ω

back termination will cause a 7% gain error. Decreasing

the value of the back termination resistors will decrease

the signal attenuation but may compromise the AC re-

sponse. However, connecting the LT6554 outputs to the

output traces on the DC794 board without some series

resistance is not recommended; 10Ω to 20Ω is generally

sufficient.

A fourth signal trace is provided at the bottom of the

DC794 demo board with dimensions identical to the

combined input and output of the other channels. This

trace can be used for calibrating the effects of electrical

delay and impedance mismatching and is not necessary

in an end-user application. Jumpers and additional con-

nectors are also included to allow for evaluation of the

enable feature and single supply operation.

RGB Video Selector/Cable Driver

A video multiplexer can be implemented using the EN pins

of parallel LT6554s as shown in Figure 5. In this applica-

tion, the corresponding outputs are connected together

and one LT6554 is switched on while the other is switched

off. A fast inverter provides a complementary signal to

ensure that only one set of R, G and B channels is buffered

at any time.

Since the output impedance of a disabled LT6554 is very

high, adding additional channels will not resistively load

an enabled output. However, since the disabled LT6554

has around 6pF of capacitance, it may be desirable to

resistively isolate the outputs of each channel to maintain

flat frequency response as shown in the graph labeled

“Maximum Capacitive Load vs Output Series Resistor” in

the Typical Performance Characteristics section.

Figure 4. DC794 Demo Board Schematic

J4

BANANA JACK

10

11

12

13

14

15

16

R6

75Ω

R5

75Ω

R4

75Ω

R1

75Ω

R2

75Ω

R3

75Ω

Z = 75

Z = 75

Z = 75

Z = 75

C1

4700pF

9

INB

AGND

ING

AGND

INR

DGND

EN

8

7

6

5

4

3

2

1

OUTB

OUTG

OUTR

LT6554

6554 F04

C2

470pF

C3

4700pF

C4

10µF, 16V

1210

J2

BANANA

JACK

J9

5

1

OUTR

4

3

2

C5

470pF

DUAL

SINGLE

C6

1000pF

C7

470pF

C8

4700pF

C9

10µF, 16V

1210

J10

5

J12

BNC

BNC x3

5

1

CAL

4

3

2

1

OUTG

4

3

2

J11

5

1

OUTB

4

3

2

J8

BNC

5

1

J3

BANANA

JACK

E3

AGND

E1

EN

E2

DGND

CAL

AGND

4

3

2

13

2

JP3

SUPPLY

ENABLE

EXT

3

1 2

JP1

CONTROL

J5

5

1

INR

4

3

2

J6

5

BNC × 3

1

ING

4

3

2

J7

5

1

Z = 75

Z = 75

Z = 75

INB

4

3

2

AGND

FLOAT

3

1 2

JP2

DGND

J1

50Ω BNC

EN

5432

1

ALL BNC: CANARE BCJ-BPLH