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CDK8307 データシート(PDF) 16 Page - Cadeka Microcircuits LLC. |
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CDK8307 データシート(HTML) 16 Page - Cadeka Microcircuits LLC. |
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16 / 29 page  ©2009 CADEKA Microcircuits LLC www.cadeka.com 16 PRELIMINARY Data Sheet Name Description Default D 1 5 D 1 4 D 1 3 D 1 2 D 1 1 D 1 0 D 9 D 8 D 7 D 6 D 5 D 4 D 3 D 2 D 1 D 0 Address In Hex rst Software reset. This bit is self-clearing Inactive X 00 pd_ch<8:1> Channel-specific power-down Inactive X X X X X X X X 0F sleep Go to sleep-mode Inactive X pd Go to power-down Inactive X pd_pin_cfg Configures the PD pin for sleep-mode PD pin configured for power-down mode X ilvds_lclk<2:0> LVDS current drive programma- bility for LCLKP and LCLKN pins 3.5mA drive X X X 11 ilvds_ frame<2:0> LVDS current drive programma- bility for FCLKP and FCLKN pins 3.5mA drive X X X ilvds_dat<2:0> LVDS current drive programma- bility for output data pins 3.5mA drive X X X en_lvds_term Enables internal termination for LVDS buffers Termination disabled X 12 term_lclk<2:0> Programmable termination for LCLKN and LCLKP buffers Termination disabled 1 X X X term_ frame<2:0> Programmable termination for FCLKN and FCLKP buffers Termination disabled 1 X X X term_dat<2:0> Programmable termination for output data buffers Termination disabled 1 X X X invert_ch<8:1> Swaps the polarity of the analog input pins electrically IPx is positive input X X X X X X X X 24 en_ramp Enables a repeating full-scale ramp pattern on the outputs Inactive X 0 0 25 dual_custom_pat Enable the mode wherein the output toggles between two defined codes Inactive 0 X 0 single_custom_ pat Enables the mode wherein the output is a constant specified code Inactive 0 0 X bits_cus- tom1<13:0> Bits for the single custom pattern and for the first code of the dual custom pattern. <0> is the LSB Inactive X X X X X X X X X X X X X X 26 bits_cus- tom2<13:0> Bits for the second code of the dual custom pattern Inactive X X X X X X X X X X X X X X 27 gain_ch1<3:0> Programmable gain for channel 1 0dB gain X X X X 2A gain_ch2<3:0> Programmable gain for channel 2 0dB gain X X X X gain_ch3<3:0> Programmable gain for channel 3 0dB gain X X X X gain_ch4<3:0> Programmable gain for channel 4 0dB gain X X X X gain_ch5<3:0> Programmable gain for channel 5 0dB gain X X X X 2B gain_ch6<3:0> Programmable gain for channel 6 0dB gain X X X X gain_ch7<3:0> Programmable gain for channel 7 0dB gain X X X X gain_ch8<3:0> Programmable gain for channel 8 0dB gain X X X X Serial Register Map Table 2. Summary of Functions Supported by the Serial Interface |
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