データシートサーチシステム
  Japanese  ▼
ALLDATASHEET.JP

X  

Preview PDF HTML

LE24LB642CS データシート(PDF) 3 Page - Sanyo Semicon Device

部品番号 LE24LB642CS
部品情報  Two Wire Serial Interface EEPROM
PDF  11 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
メーカー  SANYO [Sanyo Semicon Device]
ホームページ  https://www.sanyo-av.com/us/
Logo SANYO - Sanyo Semicon Device

LE24LB642CS データシート(HTML) 3 Page - Sanyo Semicon Device

  LE24LB642CS Datasheet HTML 1Page - Sanyo Semicon Device LE24LB642CS Datasheet HTML 2Page - Sanyo Semicon Device LE24LB642CS Datasheet HTML 3Page - Sanyo Semicon Device LE24LB642CS Datasheet HTML 4Page - Sanyo Semicon Device LE24LB642CS Datasheet HTML 5Page - Sanyo Semicon Device LE24LB642CS Datasheet HTML 6Page - Sanyo Semicon Device LE24LB642CS Datasheet HTML 7Page - Sanyo Semicon Device LE24LB642CS Datasheet HTML 8Page - Sanyo Semicon Device LE24LB642CS Datasheet HTML 9Page - Sanyo Semicon Device Next Button
Zoom Inzoom in Zoom Outzoom out
 3 / 11 page
background image
LE24LB642CS
DC Electrical Characteristics
VDD=1.7V to 3.6V
Parameter
Symbol
Conditions
min
typ
max
unit
Supply current at reading
ICC1
f=400kHz
0.5
mA
Supply current at writing
ICC2
f=400kHz
3
mA
Standby current
ISB
VIN=VDD or GND
2
μA
Input leakage current
ILI
VIN=GND to VDD
-2.0
+2.0
μA
Output leakage current (SDA)
ILO
VOUT=GND to VDD
-2.0
+2.0
μA
Input low voltage
VIL
VDD*0.2
V
Input low voltage (CMOS)
VILC
0.2
V
Input high voltage
VIH
VDD*0.8
V
Input high voltage (CMOS)
VIHC
VDD-0.2
V
IOL=0.7mA, VDD=1.7V
0.2
V
Output low voltage
VOL
IOL=2.0mA, VDD=2.5V
0.4
V
Capacitance/Ta=25
°C, f=1MHz
Parameter
Symbol
Conditions
max
unit
In/Output pin capacitance
CI/O
VI/O=0V (SDA)
10
pF
Input pin capacitance
CI
VIN=0V (other than SDA)
10
pF
Note: This parameter is sampled and not 100% tested.
AC Electric Characteristics
R=3.0k
Ω
SDA
VDD
C=50pF
Input pulse level
0.1
×VDD to 0.9×VDD
Input pulse rise / fall time
20ns
Output detection voltage
0.5
×VDD
Output load
50pF+Pull up resistor 3.0k
Ω
Output Load Circuit
VDD=1.7V to 3.6V
Parameter
Symbol
min
typ
max
unit
Slave mode SCL clock frequency
fSCLS
0
400
kHz
SCL clock low time
tLOW
1200
ns
SCL clock high time
tHIGH
600
ns
SDA output delay time
tAA
100
900
ns
SDA data output hold time
tDH
100
ns
Start condition setup time
tSU.STA
600
ns
Start condition hold time
tHD.STA
600
ns
Data in setup time
tSU.DAT
100
ns
Data in hold time
tHD.DAT
0
ns
Stop condition setup time
tSU.STO
600
ns
SCL SDA rise time
tR
300
ns
SCL SDA fall time
tF
300
ns
Bus release time
tBUF
1200
ns
Noise suppression time
tSP
100
ns
Write cycle time
tWC
10
ms
No.A1464-3/11



Html Pages

1 2 3 4 5 6 7 8 9 10 11


データシート ダウンロード

Go To PDF Page


リンク URL



ALLDATASHEETはお客様のビジネスに役立ちますか？  [ DONATE ] 

Alldatasheetは   |   広告   |   お問い合わせ   |   プライバシーポリシー   |   データシートへのリンク    |   リンク交換   |   メーカーリスト
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com